unicore32 machine related files: hardware registers

/*

 * linux/arch/unicore32/include/mach/PKUnity.h

 *

 * Code specific to PKUnity SoC and UniCore ISA

 *

 * Copyright (C) 2001-2010 GUAN Xue-tao

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

/* Be sure that virtual mapping is defined right */

#ifndef __MACH_PUV3_HARDWARE_H__

#error You must include hardware.h not PKUnity.h

#endif

#include "bitfield.h"

/*

 * Memory Definitions

 */

#define PKUNITY_SDRAM_BASE		0x00000000 /* 0x00000000 - 0x7FFFFFFF 2GB */

#define PKUNITY_IOSPACE_BASE            0x80000000 /* 0x80000000 - 0xFFFFFFFF 2GB */

#define PKUNITY_PCI_BASE		0x80000000 /* 0x80000000 - 0xBFFFFFFF 1GB */

#include "regs-pci.h"

#define PKUNITY_BOOT_ROM2_BASE		0xF4000000 /* 0xF4000000 - 0xF7FFFFFF 64MB */

#define PKUNITY_BOOT_SRAM2_BASE		0xF8000000 /* 0xF8000000 - 0xFBFFFFFF 64MB */

#define PKUNITY_BOOT_FLASH_BASE		0xFC000000 /* 0xFC000000 - 0xFFFFFFFF 64MB */

/*

 * PKUNITY Memory Map Addresses: 0x0D000000 - 0x0EFFFFFF (32MB)

 */

#define PKUNITY_UVC_MMAP_BASE		0x0D000000 /* 0x0D000000 - 0x0DFFFFFF 16MB */

#define PKUNITY_UVC_MMAP_SIZE		0x01000000 /* 16MB */

#define PKUNITY_UNIGFX_MMAP_BASE        0x0E000000 /* 0x0E000000 - 0x0EFFFFFF 16MB */

#define PKUNITY_UNIGFX_MMAP_SIZE        0x01000000 /* 16MB */

/*

 * PKUNITY System Bus Addresses (PCI): 0x80000000 - 0xBFFFFFFF (1GB)

 */

/* PCI Configuration regs */

#define PKUNITY_PCICFG_BASE             0x80000000 /* 0x80000000 - 0x8000000B 12B */

/* PCI Bridge Base */

#define PKUNITY_PCIBRI_BASE             0x80010000 /* 0x80010000 - 0x80010250 592B */

/* PCI Legacy IO */

#define PKUNITY_PCILIO_BASE             0x80030000 /* 0x80030000 - 0x8003FFFF 64KB */

/* PCI AHB-PCI MEM-mapping */

#define PKUNITY_PCIMEM_BASE             0x90000000 /* 0x90000000 - 0x97FFFFFF 128MB */

/* PCI PCI-AHB MEM-mapping */

#define PKUNITY_PCIAHB_BASE             0x98000000 /* 0x98000000 - 0x9FFFFFFF 128MB */

/*

 * PKUNITY System Bus Addresses (AHB): 0xC0000000 - 0xEDFFFFFF (640MB)

 */

/* AHB-0 is DDR2 SDRAM */

/* AHB-1 is PCI Space */

#define PKUNITY_ARBITER_BASE		0xC0000000 /* AHB-2 */

#define PKUNITY_DDR2CTRL_BASE		0xC0100000 /* AHB-3 */

#define PKUNITY_DMAC_BASE		0xC0200000 /* AHB-4 */

#include "regs-dmac.h"

#define PKUNITY_UMAL_BASE		0xC0300000 /* AHB-5 */

#include "regs-umal.h"

#define PKUNITY_USB_BASE		0xC0400000 /* AHB-6 */

#define PKUNITY_SATA_BASE		0xC0500000 /* AHB-7 */

#define PKUNITY_SMC_BASE		0xC0600000 /* AHB-8 */

/* AHB-9 is for APB bridge */

#define PKUNITY_MME_BASE		0xC0700000 /* AHB-10 */

#define PKUNITY_UNIGFX_BASE		0xC0800000 /* AHB-11 */

#include "regs-unigfx.h"

#define PKUNITY_NAND_BASE		0xC0900000 /* AHB-12 */

#include "regs-nand.h"

#define PKUNITY_H264D_BASE		0xC0A00000 /* AHB-13 */

#define PKUNITY_H264E_BASE		0xC0B00000 /* AHB-14 */

/*

 * PKUNITY Peripheral Bus Addresses (APB): 0xEE000000 - 0xEFFFFFFF (128MB)

 */

#define PKUNITY_UART0_BASE		0xEE000000 /* APB-0 */

#define PKUNITY_UART1_BASE		0xEE100000 /* APB-1 */

#include "regs-uart.h"

#define PKUNITY_I2C_BASE		0xEE200000 /* APB-2 */

#include "regs-i2c.h"

#define PKUNITY_SPI_BASE		0xEE300000 /* APB-3 */

#include "regs-spi.h"

#define PKUNITY_AC97_BASE		0xEE400000 /* APB-4 */

#include "regs-ac97.h"

#define PKUNITY_GPIO_BASE		0xEE500000 /* APB-5 */

#include "regs-gpio.h"

#define PKUNITY_INTC_BASE		0xEE600000 /* APB-6 */

#include "regs-intc.h"

#define PKUNITY_RTC_BASE		0xEE700000 /* APB-7 */

#include "regs-rtc.h"

#define PKUNITY_OST_BASE		0xEE800000 /* APB-8 */

#include "regs-ost.h"

#define PKUNITY_RESETC_BASE		0xEE900000 /* APB-9 */

#include "regs-resetc.h"

#define PKUNITY_PM_BASE			0xEEA00000 /* APB-10 */

#include "regs-pm.h"

#define PKUNITY_PS2_BASE		0xEEB00000 /* APB-11 */

#include "regs-ps2.h"

#define PKUNITY_SDC_BASE		0xEEC00000 /* APB-12 */

#include "regs-sdc.h"

/*

 * linux/arch/unicore32/include/mach/bitfield.h

 *

 * Code specific to PKUnity SoC and UniCore ISA

 *

 * Copyright (C) 2001-2010 GUAN Xue-tao

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

#ifndef __MACH_PUV3_BITFIELD_H__

#define __MACH_PUV3_BITFIELD_H__

#ifndef __ASSEMBLY__

#define UData(Data)	((unsigned long) (Data))

#else

#define UData(Data)	(Data)

#endif

#define FIELD(val, vmask, vshift)	(((val) & ((UData(1) << (vmask)) - 1)) << (vshift))

#define FMASK(vmask, vshift)		(((UData(1) << (vmask)) - 1) << (vshift))

#endif /* __MACH_PUV3_BITFIELD_H__ */

/*

 * linux/arch/unicore32/include/mach/hardware.h

 *

 * Code specific to PKUnity SoC and UniCore ISA

 *

 * Copyright (C) 2001-2010 GUAN Xue-tao

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This file contains the hardware definitions for PKUnity architecture

 */

#ifndef __MACH_PUV3_HARDWARE_H__

#define __MACH_PUV3_HARDWARE_H__

#include "PKUnity.h"

#define io_p2v(x)	((x) - PKUNITY_IOSPACE_BASE)

#define io_v2p(x)	((x) + PKUNITY_IOSPACE_BASE)

#ifndef __ASSEMBLY__

# define __REG(x)	(*((volatile unsigned long *)io_p2v(x)))

# define __PREG(x)	(io_v2p((unsigned long)&(x)))

#else

# define __REG(x)	io_p2v(x)

# define __PREG(x)	io_v2p(x)

#endif

#define PCIBIOS_MIN_IO			0x4000 /* should lower than 64KB */

#define PCIBIOS_MIN_MEM			PKUNITY_PCIMEM_BASE

/*

 * We override the standard dma-mask routines for bouncing.

 */

#define	HAVE_ARCH_PCI_SET_DMA_MASK

#define pcibios_assign_all_busses()	1

#endif  /* __MACH_PUV3_HARDWARE_H__ */

/*

 * PKUnity AC97 Registers

 */

#define PKUNITY_AC97_CONR		__REG(PKUNITY_AC97_BASE + 0x0000)

#define PKUNITY_AC97_OCR		__REG(PKUNITY_AC97_BASE + 0x0004)

#define PKUNITY_AC97_ICR		__REG(PKUNITY_AC97_BASE + 0x0008)

#define PKUNITY_AC97_CRAC		__REG(PKUNITY_AC97_BASE + 0x000C)

#define PKUNITY_AC97_INTR		__REG(PKUNITY_AC97_BASE + 0x0010)

#define PKUNITY_AC97_INTRSTAT		__REG(PKUNITY_AC97_BASE + 0x0014)

#define PKUNITY_AC97_INTRCLEAR		__REG(PKUNITY_AC97_BASE + 0x0018)

#define PKUNITY_AC97_ENABLE		__REG(PKUNITY_AC97_BASE + 0x001C)

#define PKUNITY_AC97_OUT_FIFO		__REG(PKUNITY_AC97_BASE + 0x0020)

#define PKUNITY_AC97_IN_FIFO		__REG(PKUNITY_AC97_BASE + 0x0030)

#define AC97_CODEC_REG(v)               FIELD((v), 7, 16)

#define AC97_CODEC_VAL(v)               FIELD((v), 16, 0)

#define AC97_CODEC_WRITECOMPLETE        FIELD(1, 1, 2)

/*

 * VAR PLAY SAMPLE RATE

 */

#define AC97_CMD_VPSAMPLE		(FIELD(3, 2, 16) | FIELD(3, 2, 0))

/*

 * FIX CAPTURE SAMPLE RATE

 */

#define AC97_CMD_FCSAMPLE		FIELD(7, 3, 0)

#define AC97_CMD_RESET			FIELD(1, 1, 0)

#define AC97_CMD_ENABLE			FIELD(1, 1, 0)

#define AC97_CMD_DISABLE		FIELD(0, 1, 0)

/*

 * PKUnity Direct Memory Access Controller (DMAC)

 */

/*

 * Interrupt Status Reg DMAC_ISR.

 */

#define DMAC_ISR		__REG(PKUNITY_DMAC_BASE + 0x0020)

/*

 * Interrupt Transfer Complete Status Reg DMAC_ITCSR.

 */

#define DMAC_ITCSR		__REG(PKUNITY_DMAC_BASE + 0x0050)

/*

 * Interrupt Transfer Complete Clear Reg DMAC_ITCCR.

 */

#define DMAC_ITCCR		__REG(PKUNITY_DMAC_BASE + 0x0060)

/*

 * Interrupt Error Status Reg DMAC_IESR.

 */

#define DMAC_IESR		__REG(PKUNITY_DMAC_BASE + 0x0080)

/*

 * Interrupt Error Clear Reg DMAC_IECR.

 */

#define DMAC_IECR		__REG(PKUNITY_DMAC_BASE + 0x0090)

/*

 * Enable Channels Reg DMAC_ENCH.

 */

#define DMAC_ENCH		__REG(PKUNITY_DMAC_BASE + 0x00B0)

/*

 * DMA control reg. Space [byte]

 */

#define DMASp                   0x00000100

/*

 * Source Addr DMAC_SRCADDR(ch).

 */

#define DMAC_SRCADDR(ch)	__REG(PKUNITY_DMAC_BASE + (ch)*DMASp + 0x00)

/*

 * Destination Addr DMAC_DESTADDR(ch).

 */

#define DMAC_DESTADDR(ch)	__REG(PKUNITY_DMAC_BASE + (ch)*DMASp + 0x04)

/*

 * Control Reg DMAC_CONTROL(ch).

 */

#define DMAC_CONTROL(ch)	__REG(PKUNITY_DMAC_BASE + (ch)*DMASp + 0x0C)

/*

 * Configuration Reg DMAC_CONFIG(ch).

 */

#define DMAC_CONFIG(ch)		__REG(PKUNITY_DMAC_BASE + (ch)*DMASp + 0x10)

#define DMAC_IR_MASK            FMASK(6, 0)

/*

 * select channel (ch)

 */

#define DMAC_CHANNEL(ch)	FIELD(1, 1, (ch))

#define DMAC_CONTROL_SIZE_BYTE(v)       (FIELD((v), 12, 14) | \

					FIELD(0, 3, 9) | FIELD(0, 3, 6))

#define DMAC_CONTROL_SIZE_HWORD(v)      (FIELD((v) >> 1, 12, 14) | \

					FIELD(1, 3, 9) | FIELD(1, 3, 6))

#define DMAC_CONTROL_SIZE_WORD(v)       (FIELD((v) >> 2, 12, 14) | \

					FIELD(2, 3, 9) | FIELD(2, 3, 6))

#define DMAC_CONTROL_DI                 FIELD(1, 1, 13)

#define DMAC_CONTROL_SI                 FIELD(1, 1, 12)

#define DMAC_CONTROL_BURST_1BYTE        (FIELD(0, 3, 3) | FIELD(0, 3, 0))

#define DMAC_CONTROL_BURST_4BYTE        (FIELD(3, 3, 3) | FIELD(3, 3, 0))

#define DMAC_CONTROL_BURST_8BYTE        (FIELD(5, 3, 3) | FIELD(5, 3, 0))

#define DMAC_CONTROL_BURST_16BYTE       (FIELD(7, 3, 3) | FIELD(7, 3, 0))

#define	DMAC_CONFIG_UART0_WR    (FIELD(2, 4, 11) | FIELD(1, 2, 1))

#define	DMAC_CONFIG_UART0_RD    (FIELD(2, 4, 7)  | FIELD(2, 2, 1))

#define	DMAC_CONFIG_UART1_WR    (FIELD(3, 4, 11) | FIELD(1, 2, 1))

#define	DMAC_CONFIG_UART1RD     (FIELD(3, 4, 7)  | FIELD(2, 2, 1))

#define	DMAC_CONFIG_AC97WR      (FIELD(4, 4, 11) | FIELD(1, 2, 1))

#define	DMAC_CONFIG_AC97RD      (FIELD(4, 4, 7)  | FIELD(2, 2, 1))

#define	DMAC_CONFIG_MMCWR       (FIELD(7, 4, 11) | FIELD(1, 2, 1))

#define	DMAC_CONFIG_MMCRD       (FIELD(7, 4, 7)  | FIELD(2, 2, 1))

#define DMAC_CONFIG_MASKITC     FIELD(1, 1, 4)

#define DMAC_CONFIG_MASKIE      FIELD(1, 1, 3)

#define DMAC_CONFIG_EN          FIELD(1, 1, 0)