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Commit a8b253b9 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge tag 'pinctrl-v4.1-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 

Pull pin control fixes from Linus Walleij:
 "Here are some three pin control fixes for the v4.1 cycle, all
  driver-specific.  Business as usual and calm as it should be in this
  portion of the merge window.

   - IRQ trigger fix for the Intel Cherryview

   - GPIO-to-pin mapping fix for the Cygnus driver

   - GPIO-to-pin mapping fix for the Meson8b driver"

* tag 'pinctrl-v4.1-4' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
  pinctrl: Fix gpio/pin mapping for Meson8b
  pinctrl: cygnus: fixed incorrect GPIO-pin mapping
  pinctrl: cherryview: Read triggering type from HW if not set when requested
parents e7db38a2 984cffde

drivers/pinctrl/bcm/pinctrl-cygnus-gpio.c

+3 −1
Original line number Original line Diff line number Diff line
@@ -643,7 +643,9 @@ static const struct cygnus_gpio_pin_range cygnus_gpio_pintable[] = { 
	CYGNUS_PINRANGE(87, 104, 12),

	CYGNUS_PINRANGE(87, 104, 12),

	CYGNUS_PINRANGE(99, 102, 2),

	CYGNUS_PINRANGE(99, 102, 2),

	CYGNUS_PINRANGE(101, 90, 4),

	CYGNUS_PINRANGE(101, 90, 4),

	CYGNUS_PINRANGE(105, 116, 10),

	CYGNUS_PINRANGE(105, 116, 6),

	CYGNUS_PINRANGE(111, 100, 2),

	CYGNUS_PINRANGE(113, 122, 4),

	CYGNUS_PINRANGE(123, 11, 1),

	CYGNUS_PINRANGE(123, 11, 1),

	CYGNUS_PINRANGE(124, 38, 4),

	CYGNUS_PINRANGE(124, 38, 4),

	CYGNUS_PINRANGE(128, 43, 1),

	CYGNUS_PINRANGE(128, 43, 1),

drivers/pinctrl/intel/pinctrl-cherryview.c

+44 −0
Original line number Original line Diff line number Diff line
@@ -1292,6 +1292,49 @@ static void chv_gpio_irq_unmask(struct irq_data *d) 
	chv_gpio_irq_mask_unmask(d, false);

	chv_gpio_irq_mask_unmask(d, false);

}

}





static unsigned chv_gpio_irq_startup(struct irq_data *d)

{

	/*

	 * Check if the interrupt has been requested with 0 as triggering

	 * type. In that case it is assumed that the current values

	 * programmed to the hardware are used (e.g BIOS configured

	 * defaults).

	 *

	 * In that case ->irq_set_type() will never be called so we need to

	 * read back the values from hardware now, set correct flow handler

	 * and update mappings before the interrupt is being used.

	 */

	if (irqd_get_trigger_type(d) == IRQ_TYPE_NONE) {

		struct gpio_chip *gc = irq_data_get_irq_chip_data(d);

		struct chv_pinctrl *pctrl = gpiochip_to_pinctrl(gc);

		unsigned offset = irqd_to_hwirq(d);

		int pin = chv_gpio_offset_to_pin(pctrl, offset);

		irq_flow_handler_t handler;

		unsigned long flags;

		u32 intsel, value;



		intsel = readl(chv_padreg(pctrl, pin, CHV_PADCTRL0));

		intsel &= CHV_PADCTRL0_INTSEL_MASK;

		intsel >>= CHV_PADCTRL0_INTSEL_SHIFT;



		value = readl(chv_padreg(pctrl, pin, CHV_PADCTRL1));

		if (value & CHV_PADCTRL1_INTWAKECFG_LEVEL)

			handler = handle_level_irq;

		else

			handler = handle_edge_irq;



		spin_lock_irqsave(&pctrl->lock, flags);

		if (!pctrl->intr_lines[intsel]) {

			__irq_set_handler_locked(d->irq, handler);

			pctrl->intr_lines[intsel] = offset;

		}

		spin_unlock_irqrestore(&pctrl->lock, flags);

	}



	chv_gpio_irq_unmask(d);

	return 0;

}



static int chv_gpio_irq_type(struct irq_data *d, unsigned type)

static int chv_gpio_irq_type(struct irq_data *d, unsigned type)

{

{

	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);

	struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
@@ -1357,6 +1400,7 @@ static int chv_gpio_irq_type(struct irq_data *d, unsigned type) 




static struct irq_chip chv_gpio_irqchip = {

static struct irq_chip chv_gpio_irqchip = {

	.name = "chv-gpio",

	.name = "chv-gpio",

	.irq_startup = chv_gpio_irq_startup,

	.irq_ack = chv_gpio_irq_ack,

	.irq_ack = chv_gpio_irq_ack,

	.irq_mask = chv_gpio_irq_mask,

	.irq_mask = chv_gpio_irq_mask,

	.irq_unmask = chv_gpio_irq_unmask,

	.irq_unmask = chv_gpio_irq_unmask,

drivers/pinctrl/meson/pinctrl-meson.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -569,7 +569,7 @@ static int meson_gpiolib_register(struct meson_pinctrl *pc) 
		domain->chip.direction_output = meson_gpio_direction_output;

		domain->chip.direction_output = meson_gpio_direction_output;

		domain->chip.get = meson_gpio_get;

		domain->chip.get = meson_gpio_get;

		domain->chip.set = meson_gpio_set;

		domain->chip.set = meson_gpio_set;

		domain->chip.base = -1;

		domain->chip.base = domain->data->pin_base;

		domain->chip.ngpio = domain->data->num_pins;

		domain->chip.ngpio = domain->data->num_pins;

		domain->chip.can_sleep = false;

		domain->chip.can_sleep = false;

		domain->chip.of_node = domain->of_node;

		domain->chip.of_node = domain->of_node;

drivers/pinctrl/meson/pinctrl-meson8b.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -876,13 +876,13 @@ static struct meson_domain_data meson8b_domain_data[] = { 
		.banks		= meson8b_banks,

		.banks		= meson8b_banks,

		.num_banks	= ARRAY_SIZE(meson8b_banks),

		.num_banks	= ARRAY_SIZE(meson8b_banks),

		.pin_base	= 0,

		.pin_base	= 0,

		.num_pins	= 83,

		.num_pins	= 130,

	},

	},

	{

	{

		.name		= "ao-bank",

		.name		= "ao-bank",

		.banks		= meson8b_ao_banks,

		.banks		= meson8b_ao_banks,

		.num_banks	= ARRAY_SIZE(meson8b_ao_banks),

		.num_banks	= ARRAY_SIZE(meson8b_ao_banks),

		.pin_base	= 83,

		.pin_base	= 130,

		.num_pins	= 16,

		.num_pins	= 16,

	},

	},

};

};