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Commit a8053854 authored by Leonid Yegoshin's avatar Leonid Yegoshin Committed by Ralf Baechle
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MIPS: asm: r4kcache: Add protected cache operation for EVA

parent 41e62b04
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+18 −0
Original line number Original line Diff line number Diff line
@@ -212,6 +212,20 @@ static inline void flush_scache_line(unsigned long addr)
	:							\
	:							\
	: "i" (op), "r" (addr))
	: "i" (op), "r" (addr))


#define protected_cachee_op(op,addr)				\
	__asm__ __volatile__(					\
	"	.set	push			\n"		\
	"	.set	noreorder		\n"		\
	"	.set	mips0			\n"		\
	"	.set	eva			\n"		\
	"1:	cachee	%0, (%1)		\n"		\
	"2:	.set	pop			\n"		\
	"	.section __ex_table,\"a\"	\n"		\
	"	"STR(PTR)" 1b, 2b		\n"		\
	"	.previous"					\
	:							\
	: "i" (op), "r" (addr))

/*
/*
 * The next two are for badland addresses like signal trampolines.
 * The next two are for badland addresses like signal trampolines.
 */
 */
@@ -223,7 +237,11 @@ static inline void protected_flush_icache_line(unsigned long addr)
		break;
		break;


	default:
	default:
#ifdef CONFIG_EVA
		protected_cachee_op(Hit_Invalidate_I, addr);
#else
		protected_cache_op(Hit_Invalidate_I, addr);
		protected_cache_op(Hit_Invalidate_I, addr);
#endif
		break;
		break;
	}
	}
}
}