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Commit a7448db4 authored by Haavard Skinnemoen's avatar Haavard Skinnemoen
Browse files

avr32: Remove include/asm-avr32/arch-at32ap



Since all users have been converted over to use <mach/foo.h>, there's no
need for the arch-at32ap directory and associated symlink anymore.

Signed-off-by: default avatarHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
parent a09e64fb
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@@ -39,20 +39,6 @@ core-y += arch/avr32/mm/
drivers-$(CONFIG_OPROFILE)		+= arch/avr32/oprofile/
libs-y					+= arch/avr32/lib/

archincdir-$(CONFIG_PLATFORM_AT32AP)	:= arch-at32ap

include/asm-avr32/.arch: $(wildcard include/config/platform/*.h) include/config/auto.conf
	@echo '  SYMLINK include/asm-avr32/arch -> include/asm-avr32/$(archincdir-y)'
ifneq ($(KBUILD_SRC),)
	$(Q)mkdir -p include/asm-avr32
	$(Q)ln -fsn $(srctree)/include/asm-avr32/$(archincdir-y) include/asm-avr32/arch
else
	$(Q)ln -fsn $(archincdir-y) include/asm-avr32/arch
endif
	@touch $@

archprepare: include/asm-avr32/.arch

CLEAN_FILES += include/asm-avr32/.arch include/asm-avr32/arch

BOOT_TARGETS := vmlinux.elf vmlinux.bin uImage uImage.srec
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/*
 * Pin definitions for AT32AP7000.
 *
 * Copyright (C) 2006 Atmel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#ifndef __ASM_ARCH_AT32AP700X_H__
#define __ASM_ARCH_AT32AP700X_H__

#define GPIO_PERIPH_A	0
#define GPIO_PERIPH_B	1

/*
 * Pin numbers identifying specific GPIO pins on the chip. They can
 * also be converted to IRQ numbers by passing them through
 * gpio_to_irq().
 */
#define GPIO_PIOA_BASE	(0)
#define GPIO_PIOB_BASE	(GPIO_PIOA_BASE + 32)
#define GPIO_PIOC_BASE	(GPIO_PIOB_BASE + 32)
#define GPIO_PIOD_BASE	(GPIO_PIOC_BASE + 32)
#define GPIO_PIOE_BASE	(GPIO_PIOD_BASE + 32)

#define GPIO_PIN_PA(N)	(GPIO_PIOA_BASE + (N))
#define GPIO_PIN_PB(N)	(GPIO_PIOB_BASE + (N))
#define GPIO_PIN_PC(N)	(GPIO_PIOC_BASE + (N))
#define GPIO_PIN_PD(N)	(GPIO_PIOD_BASE + (N))
#define GPIO_PIN_PE(N)	(GPIO_PIOE_BASE + (N))


/*
 * DMAC peripheral hardware handshaking interfaces, used with dw_dmac
 */
#define DMAC_MCI_RX		0
#define DMAC_MCI_TX		1
#define DMAC_DAC_TX		2
#define DMAC_AC97_A_RX		3
#define DMAC_AC97_A_TX		4
#define DMAC_AC97_B_RX		5
#define DMAC_AC97_B_TX		6
#define DMAC_DMAREQ_0		7
#define DMAC_DMAREQ_1		8
#define DMAC_DMAREQ_2		9
#define DMAC_DMAREQ_3		10

#endif /* __ASM_ARCH_AT32AP700X_H__ */
+0 −121
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/*
 * Platform data definitions.
 */
#ifndef __ASM_ARCH_BOARD_H
#define __ASM_ARCH_BOARD_H

#include <linux/types.h>

#define GPIO_PIN_NONE	(-1)

/*
 * Clock rates for various on-board oscillators. The number of entries
 * in this array is chip-dependent.
 */
extern unsigned long at32_board_osc_rates[];
  
/* Add basic devices: system manager, interrupt controller, portmuxes, etc. */
void at32_add_system_devices(void);

#define ATMEL_MAX_UART	4
extern struct platform_device *atmel_default_console_device;

struct atmel_uart_data {
	short		use_dma_tx;	/* use transmit DMA? */
	short		use_dma_rx;	/* use receive DMA? */
	void __iomem	*regs;		/* virtual base address, if any */
};
void at32_map_usart(unsigned int hw_id, unsigned int line);
struct platform_device *at32_add_device_usart(unsigned int id);

struct eth_platform_data {
	u32	phy_mask;
	u8	is_rmii;
};
struct platform_device *
at32_add_device_eth(unsigned int id, struct eth_platform_data *data);

struct spi_board_info;
struct platform_device *
at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n);

struct atmel_lcdfb_info;
struct platform_device *
at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data,
		     unsigned long fbmem_start, unsigned long fbmem_len,
		     unsigned int pin_config);

struct usba_platform_data;
struct platform_device *
at32_add_device_usba(unsigned int id, struct usba_platform_data *data);

struct ide_platform_data {
	u8      cs;
};
struct platform_device *
at32_add_device_ide(unsigned int id, unsigned int extint,
		    struct ide_platform_data *data);

/* mask says which PWM channels to mux */
struct platform_device *at32_add_device_pwm(u32 mask);

/* depending on what's hooked up, not all SSC pins will be used */
#define	ATMEL_SSC_TK		0x01
#define	ATMEL_SSC_TF		0x02
#define	ATMEL_SSC_TD		0x04
#define	ATMEL_SSC_TX		(ATMEL_SSC_TK | ATMEL_SSC_TF | ATMEL_SSC_TD)

#define	ATMEL_SSC_RK		0x10
#define	ATMEL_SSC_RF		0x20
#define	ATMEL_SSC_RD		0x40
#define	ATMEL_SSC_RX		(ATMEL_SSC_RK | ATMEL_SSC_RF | ATMEL_SSC_RD)

struct platform_device *
at32_add_device_ssc(unsigned int id, unsigned int flags);

struct i2c_board_info;
struct platform_device *at32_add_device_twi(unsigned int id,
					    struct i2c_board_info *b,
					    unsigned int n);

struct mci_platform_data;
struct platform_device *
at32_add_device_mci(unsigned int id, struct mci_platform_data *data);

struct ac97c_platform_data {
	unsigned short dma_rx_periph_id;
	unsigned short dma_tx_periph_id;
	unsigned short dma_controller_id;
	int reset_pin;
};
struct platform_device *
at32_add_device_ac97c(unsigned int id, struct ac97c_platform_data *data);

struct platform_device *at32_add_device_abdac(unsigned int id);
struct platform_device *at32_add_device_psif(unsigned int id);

struct cf_platform_data {
	int	detect_pin;
	int	reset_pin;
	int	vcc_pin;
	int	ready_pin;
	u8	cs;
};
struct platform_device *
at32_add_device_cf(unsigned int id, unsigned int extint,
		struct cf_platform_data *data);

/* NAND / SmartMedia */
struct atmel_nand_data {
	int	enable_pin;	/* chip enable */
	int	det_pin;	/* card detect */
	int	rdy_pin;	/* ready/busy */
	u8	ale;		/* address line number connected to ALE */
	u8	cle;		/* address line number connected to CLE */
	u8	bus_width_16;	/* buswidth is 16 bit */
	struct mtd_partition *(*partition_info)(int size, int *num_partitions);
};
struct platform_device *
at32_add_device_nand(unsigned int id, struct atmel_nand_data *data);

#endif /* __ASM_ARCH_BOARD_H */
+0 −35
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/*
 * AVR32 and (fake) AT91 CPU identification
 *
 * Copyright (C) 2007 Atmel Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#ifndef __ASM_ARCH_CPU_H
#define __ASM_ARCH_CPU_H

/*
 * Only AT32AP7000 is defined for now. We can identify the specific
 * chip at runtime, but I'm not sure if it's really worth it.
 */
#ifdef CONFIG_CPU_AT32AP700X
# define cpu_is_at32ap7000()	(1)
#else
# define cpu_is_at32ap7000()	(0)
#endif

/*
 * Since this is AVR32, we will never run on any AT91 CPU. But these
 * definitions may reduce clutter in common drivers.
 */
#define cpu_is_at91rm9200()	(0)
#define cpu_is_at91sam9xe()	(0)
#define cpu_is_at91sam9260()	(0)
#define cpu_is_at91sam9261()	(0)
#define cpu_is_at91sam9263()	(0)
#define cpu_is_at91sam9rl()	(0)
#define cpu_is_at91cap9()	(0)

#endif /* __ASM_ARCH_CPU_H */
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#ifndef __ASM_AVR32_ARCH_GPIO_H
#define __ASM_AVR32_ARCH_GPIO_H

#include <linux/compiler.h>
#include <asm/irq.h>


/* Some GPIO chips can manage IRQs; some can't.  The exact numbers can
 * be changed if needed, but for the moment they're not configurable.
 */
#define ARCH_NR_GPIOS	(NR_GPIO_IRQS + 2 * 32)


/* Arch-neutral GPIO API, supporting both "native" and external GPIOs. */
#include <asm-generic/gpio.h>

static inline int gpio_get_value(unsigned int gpio)
{
	return __gpio_get_value(gpio);
}

static inline void gpio_set_value(unsigned int gpio, int value)
{
	__gpio_set_value(gpio, value);
}

static inline int gpio_cansleep(unsigned int gpio)
{
	return __gpio_cansleep(gpio);
}


static inline int gpio_to_irq(unsigned int gpio)
{
	if (gpio < NR_GPIO_IRQS)
		return gpio + GPIO_IRQ_BASE;
	return -EINVAL;
}

static inline int irq_to_gpio(unsigned int irq)
{
	return irq - GPIO_IRQ_BASE;
}

#endif /* __ASM_AVR32_ARCH_GPIO_H */
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