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Commit a5e9a69e authored by Paul Burton's avatar Paul Burton Committed by Ralf Baechle
Browse files

MIPS: Detect the MSA ASE 



This patch adds support for probing the MSAP bit within the Config3
register in order to detect the presence of the MSA ASE. Presence of the
ASE will be indicated in /proc/cpuinfo. The value of the MSA
implementation register will be displayed at boot to aid debugging and
verification of a correct setup, as is done for the FPU.

Signed-off-by: default avatarPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6430/


Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 7f65afb9

arch/mips/Kconfig

+19 −0
Original line number Diff line number Diff line
@@ -1208,6 +1208,7 @@ config CPU_MIPS32_R2 
	select CPU_HAS_PREFETCH

	select CPU_SUPPORTS_32BIT_KERNEL

	select CPU_SUPPORTS_HIGHMEM

	select CPU_SUPPORTS_MSA

	select HAVE_KVM

	help

	  Choose this option to build a kernel for release 2 or later of the
@@ -1243,6 +1244,7 @@ config CPU_MIPS64_R2 
	select CPU_SUPPORTS_64BIT_KERNEL

	select CPU_SUPPORTS_HIGHMEM

	select CPU_SUPPORTS_HUGEPAGES

	select CPU_SUPPORTS_MSA

	help

	  Choose this option to build a kernel for release 2 or later of the

	  MIPS64 architecture.  Many modern embedded systems with a 64-bit
@@ -2081,6 +2083,20 @@ config CPU_MICROMIPS 
	  When this option is enabled the kernel will be built using the

	  microMIPS ISA



config CPU_HAS_MSA

	bool "Support for the MIPS SIMD Architecture"

	depends on CPU_SUPPORTS_MSA

	default y

	help

	  MIPS SIMD Architecture (MSA) introduces 128 bit wide vector registers

	  and a set of SIMD instructions to operate on them. When this option

	  is enabled the kernel will support detection of the MSA ASE. If you

	  know that your kernel will only be running on CPUs which do not

	  support MSA then you may wish to say N here to reduce the size of

	  your kernel.



	  If unsure, say Y.



config CPU_HAS_WB

	bool
@@ -2146,6 +2162,9 @@ config SYS_SUPPORTS_SMARTMIPS 
config SYS_SUPPORTS_MICROMIPS

	bool



config CPU_SUPPORTS_MSA

	bool



config ARCH_FLATMEM_ENABLE

	def_bool y

	depends on !NUMA && !CPU_LOONGSON2

arch/mips/include/asm/cpu-features.h

+6 −0
Original line number Diff line number Diff line
@@ -299,4 +299,10 @@ 
#define cpu_has_vz		(cpu_data[0].ases & MIPS_ASE_VZ)

#endif



#if defined(CONFIG_CPU_HAS_MSA) && !defined(cpu_has_msa)

# define cpu_has_msa		(cpu_data[0].ases & MIPS_ASE_MSA)

#elif !defined(cpu_has_msa)

# define cpu_has_msa		0

#endif



#endif /* __ASM_CPU_FEATURES_H */

arch/mips/include/asm/cpu-info.h

+1 −0
Original line number Diff line number Diff line
@@ -49,6 +49,7 @@ struct cpuinfo_mips { 
	unsigned long		ases;

	unsigned int		processor_id;

	unsigned int		fpu_id;

	unsigned int		msa_id;

	unsigned int		cputype;

	int			isa_level;

	int			tlbsize;

arch/mips/include/asm/cpu.h

+1 −0
Original line number Diff line number Diff line
@@ -370,5 +370,6 @@ enum cpu_type_enum { 
#define MIPS_ASE_MIPSMT		0x00000020 /* CPU supports MIPS MT */

#define MIPS_ASE_DSP2P		0x00000040 /* Signal Processing ASE Rev 2 */

#define MIPS_ASE_VZ		0x00000080 /* Virtualization ASE */

#define MIPS_ASE_MSA		0x00000100 /* MIPS SIMD Architecture */



#endif /* _ASM_CPU_H */

arch/mips/kernel/cpu-probe.c

+22 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 
#include <asm/cpu-type.h>

#include <asm/fpu.h>

#include <asm/mipsregs.h>

#include <asm/msa.h>

#include <asm/watch.h>

#include <asm/elf.h>

#include <asm/spram.h>
@@ -126,6 +127,20 @@ static inline int __cpu_has_fpu(void) 
	return ((cpu_get_fpu_id() & FPIR_IMP_MASK) != FPIR_IMP_NONE);

}



static inline unsigned long cpu_get_msa_id(void)

{

	unsigned long status, conf5, msa_id;



	status = read_c0_status();

	__enable_fpu(FPU_64BIT);

	conf5 = read_c0_config5();

	enable_msa();

	msa_id = read_msa_ir();

	write_c0_config5(conf5);

	write_c0_status(status);

	return msa_id;

}



static inline void cpu_probe_vmbits(struct cpuinfo_mips *c)

{

#ifdef __NEED_VMBITS_PROBE
@@ -301,6 +316,8 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) 
		c->ases |= MIPS_ASE_VZ;

	if (config3 & MIPS_CONF3_SC)

		c->options |= MIPS_CPU_SEGMENTS;

	if (config3 & MIPS_CONF3_MSA)

		c->ases |= MIPS_ASE_MSA;



	return config3 & MIPS_CONF_M;

}
@@ -1178,6 +1195,9 @@ void cpu_probe(void) 
	else

		c->srsets = 1;



	if (cpu_has_msa)

		c->msa_id = cpu_get_msa_id();



	cpu_probe_vmbits(c);



#ifdef CONFIG_64BIT
@@ -1194,4 +1214,6 @@ void cpu_report(void) 
		smp_processor_id(), c->processor_id, cpu_name_string());

	if (c->options & MIPS_CPU_FPU)

		printk(KERN_INFO "FPU revision is: %08x\n", c->fpu_id);

	if (cpu_has_msa)

		pr_info("MSA revision is: %08x\n", c->msa_id);

}