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Commit a3a88a66 authored by Paul Bolle's avatar Paul Bolle Committed by Dave Airlie
Browse files

drm: radeon: *_cs_packet_parse_vline() cleanup 



Simplify the way the return value is set a number of times (mostly on
error).

Signed-off-by: default avatarPaul Bolle <pebolle@tiscali.nl>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent 3409fc1b

drivers/gpu/drm/radeon/evergreen_cs.c

+8 −16
Original line number Diff line number Diff line
@@ -293,33 +293,28 @@ static int evergreen_cs_packet_parse_vline(struct radeon_cs_parser *p) 
	if (wait_reg_mem.type != PACKET_TYPE3 ||

	    wait_reg_mem.opcode != PACKET3_WAIT_REG_MEM) {

		DRM_ERROR("vline wait missing WAIT_REG_MEM segment\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}



	wait_reg_mem_info = radeon_get_ib_value(p, wait_reg_mem.idx + 1);

	/* bit 4 is reg (0) or mem (1) */

	if (wait_reg_mem_info & 0x10) {

		DRM_ERROR("vline WAIT_REG_MEM waiting on MEM rather than REG\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}

	/* waiting for value to be equal */

	if ((wait_reg_mem_info & 0x7) != 0x3) {

		DRM_ERROR("vline WAIT_REG_MEM function not equal\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}

	if ((radeon_get_ib_value(p, wait_reg_mem.idx + 2) << 2) != EVERGREEN_VLINE_STATUS) {

		DRM_ERROR("vline WAIT_REG_MEM bad reg\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}



	if (radeon_get_ib_value(p, wait_reg_mem.idx + 5) != EVERGREEN_VLINE_STAT) {

		DRM_ERROR("vline WAIT_REG_MEM bad bit mask\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}



	/* jump over the NOP */
@@ -337,8 +332,7 @@ static int evergreen_cs_packet_parse_vline(struct radeon_cs_parser *p) 
	obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);

	if (!obj) {

		DRM_ERROR("cannot find crtc %d\n", crtc_id);

		r = -EINVAL;

		goto out;

		return -EINVAL;

	}

	crtc = obj_to_crtc(obj);

	radeon_crtc = to_radeon_crtc(crtc);
@@ -363,12 +357,10 @@ static int evergreen_cs_packet_parse_vline(struct radeon_cs_parser *p) 
			break;

		default:

			DRM_ERROR("unknown crtc reloc\n");

			r = -EINVAL;

			goto out;

			return -EINVAL;

		}

	}

out:

	return r;

	return 0;

}



static int evergreen_packet0_check(struct radeon_cs_parser *p,

drivers/gpu/drm/radeon/r100.c

+6 −10
Original line number Diff line number Diff line
@@ -1205,14 +1205,12 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p) 
	if (waitreloc.reg != RADEON_WAIT_UNTIL ||

	    waitreloc.count != 0) {

		DRM_ERROR("vline wait had illegal wait until segment\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}



	if (radeon_get_ib_value(p, waitreloc.idx + 1) != RADEON_WAIT_CRTC_VLINE) {

		DRM_ERROR("vline wait had illegal wait until\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}



	/* jump over the NOP */
@@ -1230,8 +1228,7 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p) 
	obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);

	if (!obj) {

		DRM_ERROR("cannot find crtc %d\n", crtc_id);

		r = -EINVAL;

		goto out;

		return -EINVAL;

	}

	crtc = obj_to_crtc(obj);

	radeon_crtc = to_radeon_crtc(crtc);
@@ -1253,14 +1250,13 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p) 
			break;

		default:

			DRM_ERROR("unknown crtc reloc\n");

			r = -EINVAL;

			goto out;

			return -EINVAL;

		}

		ib[h_idx] = header;

		ib[h_idx + 3] |= RADEON_ENG_DISPLAY_SELECT_CRTC1;

	}

out:

	return r;



	return 0;

}



/**

drivers/gpu/drm/radeon/r600_cs.c

+9 −16
Original line number Diff line number Diff line
@@ -780,33 +780,28 @@ static int r600_cs_packet_parse_vline(struct radeon_cs_parser *p) 
	if (wait_reg_mem.type != PACKET_TYPE3 ||

	    wait_reg_mem.opcode != PACKET3_WAIT_REG_MEM) {

		DRM_ERROR("vline wait missing WAIT_REG_MEM segment\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}



	wait_reg_mem_info = radeon_get_ib_value(p, wait_reg_mem.idx + 1);

	/* bit 4 is reg (0) or mem (1) */

	if (wait_reg_mem_info & 0x10) {

		DRM_ERROR("vline WAIT_REG_MEM waiting on MEM rather than REG\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}

	/* waiting for value to be equal */

	if ((wait_reg_mem_info & 0x7) != 0x3) {

		DRM_ERROR("vline WAIT_REG_MEM function not equal\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}

	if ((radeon_get_ib_value(p, wait_reg_mem.idx + 2) << 2) != AVIVO_D1MODE_VLINE_STATUS) {

		DRM_ERROR("vline WAIT_REG_MEM bad reg\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}



	if (radeon_get_ib_value(p, wait_reg_mem.idx + 5) != AVIVO_D1MODE_VLINE_STAT) {

		DRM_ERROR("vline WAIT_REG_MEM bad bit mask\n");

		r = -EINVAL;

		return r;

		return -EINVAL;

	}



	/* jump over the NOP */
@@ -825,8 +820,7 @@ static int r600_cs_packet_parse_vline(struct radeon_cs_parser *p) 
	obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);

	if (!obj) {

		DRM_ERROR("cannot find crtc %d\n", crtc_id);

		r = -EINVAL;

		goto out;

		return -EINVAL;

	}

	crtc = obj_to_crtc(obj);

	radeon_crtc = to_radeon_crtc(crtc);
@@ -849,14 +843,13 @@ static int r600_cs_packet_parse_vline(struct radeon_cs_parser *p) 
			break;

		default:

			DRM_ERROR("unknown crtc reloc\n");

			r = -EINVAL;

			goto out;

			return -EINVAL;

		}

		ib[h_idx] = header;

		ib[h_idx + 4] = AVIVO_D2MODE_VLINE_STATUS >> 2;

	}

out:

	return r;



	return 0;

}



static int r600_packet0_check(struct radeon_cs_parser *p,