Commit 9fee7563 authored Aug 06, 2014 by Bharat Bhushan Committed by Alexander Graf Sep 22, 2014

KVM: PPC: BOOKE: allow debug interrupt at "debug level"



Debug interrupt can be either "critical level" or "debug level".
There are separate set of save/restore registers used for different level.
Example: DSRR0/DSRR1 are used for "debug level" and CSRR0/CSRR1
are used for critical level debug interrupt.

Using CPU_FTR_DEBUG_LVL_EXC to decide which interrupt level to be used.

Signed-off-by: Bharat Bhushan <Bharat.Bhushan@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>

parent f51770ed

arch/powerpc/kvm/booke.c

+5 −1

Original line number	Original line	Diff line number	Diff line
	@@ -377,7 +377,11 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
	allowed = vcpu->arch.shared->msr & MSR_DE;		allowed = vcpu->arch.shared->msr & MSR_DE;
	allowed = allowed && !crit;		allowed = allowed && !crit;
	msr_mask = MSR_ME;		msr_mask = MSR_ME;
			if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
			int_class = INT_CLASS_DBG;
			else
	int_class = INT_CLASS_CRIT;		int_class = INT_CLASS_CRIT;

	break;		break;
	}		}