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Commit 9d87dd97 authored by Russell King's avatar Russell King Committed by Russell King
Browse files

Merge branch 'orion-fixes2'

parents 92794a5d 0ed15071
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+4 −1
Original line number Original line Diff line number Diff line
@@ -372,7 +372,7 @@ config CPU_FEROCEON
	select CPU_PABRT_NOIFAR
	select CPU_PABRT_NOIFAR
	select CPU_CACHE_VIVT
	select CPU_CACHE_VIVT
	select CPU_CP15_MMU
	select CPU_CP15_MMU
	select CPU_COPY_V4WB if MMU
	select CPU_COPY_FEROCEON if MMU
	select CPU_TLB_V4WBI if MMU
	select CPU_TLB_V4WBI if MMU


config CPU_FEROCEON_OLD_ID
config CPU_FEROCEON_OLD_ID
@@ -523,6 +523,9 @@ config CPU_COPY_V4WT
config CPU_COPY_V4WB
config CPU_COPY_V4WB
	bool
	bool


config CPU_COPY_FEROCEON
	bool

config CPU_COPY_V6
config CPU_COPY_V6
	bool
	bool


+1 −0
Original line number Original line Diff line number Diff line
@@ -36,6 +36,7 @@ obj-$(CONFIG_CPU_CACHE_V7) += cache-v7.o
obj-$(CONFIG_CPU_COPY_V3)	+= copypage-v3.o
obj-$(CONFIG_CPU_COPY_V3)	+= copypage-v3.o
obj-$(CONFIG_CPU_COPY_V4WT)	+= copypage-v4wt.o
obj-$(CONFIG_CPU_COPY_V4WT)	+= copypage-v4wt.o
obj-$(CONFIG_CPU_COPY_V4WB)	+= copypage-v4wb.o
obj-$(CONFIG_CPU_COPY_V4WB)	+= copypage-v4wb.o
obj-$(CONFIG_CPU_COPY_FEROCEON)	+= copypage-feroceon.o
obj-$(CONFIG_CPU_COPY_V6)	+= copypage-v6.o context.o
obj-$(CONFIG_CPU_COPY_V6)	+= copypage-v6.o context.o
obj-$(CONFIG_CPU_SA1100)	+= copypage-v4mc.o
obj-$(CONFIG_CPU_SA1100)	+= copypage-v4mc.o
obj-$(CONFIG_CPU_XSCALE)	+= copypage-xscale.o
obj-$(CONFIG_CPU_XSCALE)	+= copypage-xscale.o
+95 −0
Original line number Original line Diff line number Diff line
/*
 *  linux/arch/arm/lib/copypage-feroceon.S
 *
 *  Copyright (C) 2008 Marvell Semiconductors
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This handles copy_user_page and clear_user_page on Feroceon
 * more optimally than the generic implementations.
 */
#include <linux/linkage.h>
#include <linux/init.h>
#include <asm/asm-offsets.h>

	.text
	.align	5

ENTRY(feroceon_copy_user_page)
	stmfd	sp!, {r4-r9, lr}
	mov	ip, #PAGE_SZ
1:	mov	lr, r1
	ldmia	r1!, {r2 - r9}
	pld	[lr, #32]
	pld	[lr, #64]
	pld	[lr, #96]
	pld	[lr, #128]
	pld	[lr, #160]
	pld	[lr, #192]
	pld	[lr, #224]
	stmia	r0, {r2 - r9}
	ldmia	r1!, {r2 - r9}
	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D line
	add	r0, r0, #32
	stmia	r0, {r2 - r9}
	ldmia	r1!, {r2 - r9}
	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D line
	add	r0, r0, #32
	stmia	r0, {r2 - r9}
	ldmia	r1!, {r2 - r9}
	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D line
	add	r0, r0, #32
	stmia	r0, {r2 - r9}
	ldmia	r1!, {r2 - r9}
	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D line
	add	r0, r0, #32
	stmia	r0, {r2 - r9}
	ldmia	r1!, {r2 - r9}
	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D line
	add	r0, r0, #32
	stmia	r0, {r2 - r9}
	ldmia	r1!, {r2 - r9}
	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D line
	add	r0, r0, #32
	stmia	r0, {r2 - r9}
	ldmia	r1!, {r2 - r9}
	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D line
	add	r0, r0, #32
	stmia	r0, {r2 - r9}
	subs	ip, ip, #(32 * 8)
	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D line
	add	r0, r0, #32
	bne	1b
	mcr	p15, 0, ip, c7, c10, 4		@ drain WB
	ldmfd	sp!, {r4-r9, pc}

	.align	5

ENTRY(feroceon_clear_user_page)
	stmfd	sp!, {r4-r7, lr}
	mov	r1, #PAGE_SZ/32
	mov	r2, #0
	mov	r3, #0
	mov	r4, #0
	mov	r5, #0
	mov	r6, #0
	mov	r7, #0
	mov	ip, #0
	mov	lr, #0
1:	stmia	r0, {r2-r7, ip, lr}
	subs	r1, r1, #1
	mcr	p15, 0, r0, c7, c14, 1		@ clean and invalidate D line
	add	r0, r0, #32
	bne	1b
	mcr	p15, 0, r1, c7, c10, 4		@ drain WB
	ldmfd	sp!, {r4-r7, pc}

	__INITDATA

	.type	feroceon_user_fns, #object
ENTRY(feroceon_user_fns)
	.long	feroceon_clear_user_page
	.long	feroceon_copy_user_page
	.size	feroceon_user_fns, . - feroceon_user_fns
+12 −5
Original line number Original line Diff line number Diff line
@@ -93,7 +93,7 @@ ENTRY(cpu_feroceon_reset)
 *
 *
 * Called with IRQs disabled
 * Called with IRQs disabled
 */
 */
	.align	10
	.align	5
ENTRY(cpu_feroceon_do_idle)
ENTRY(cpu_feroceon_do_idle)
	mov	r0, #0
	mov	r0, #0
	mcr	p15, 0, r0, c7, c10, 4		@ Drain write buffer
	mcr	p15, 0, r0, c7, c10, 4		@ Drain write buffer
@@ -106,6 +106,7 @@ ENTRY(cpu_feroceon_do_idle)
 *	Clean and invalidate all cache entries in a particular
 *	Clean and invalidate all cache entries in a particular
 *	address space.
 *	address space.
 */
 */
	.align	5
ENTRY(feroceon_flush_user_cache_all)
ENTRY(feroceon_flush_user_cache_all)
	/* FALLTHROUGH */
	/* FALLTHROUGH */


@@ -135,6 +136,7 @@ __flush_whole_cache:
 *	- end	- end address (exclusive)
 *	- end	- end address (exclusive)
 *	- flags	- vm_flags describing address space
 *	- flags	- vm_flags describing address space
 */
 */
	.align	5
ENTRY(feroceon_flush_user_cache_range)
ENTRY(feroceon_flush_user_cache_range)
	mov	ip, #0
	mov	ip, #0
	sub	r3, r1, r0			@ calculate total size
	sub	r3, r1, r0			@ calculate total size
@@ -163,6 +165,7 @@ ENTRY(feroceon_flush_user_cache_range)
 *	- start	- virtual start address
 *	- start	- virtual start address
 *	- end	- virtual end address
 *	- end	- virtual end address
 */
 */
	.align	5
ENTRY(feroceon_coherent_kern_range)
ENTRY(feroceon_coherent_kern_range)
	/* FALLTHROUGH */
	/* FALLTHROUGH */


@@ -194,6 +197,7 @@ ENTRY(feroceon_coherent_user_range)
 *
 *
 *	- addr	- page aligned address
 *	- addr	- page aligned address
 */
 */
	.align	5
ENTRY(feroceon_flush_kern_dcache_page)
ENTRY(feroceon_flush_kern_dcache_page)
	add	r1, r0, #PAGE_SZ
	add	r1, r0, #PAGE_SZ
1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
@@ -218,6 +222,7 @@ ENTRY(feroceon_flush_kern_dcache_page)
 *
 *
 * (same as v4wb)
 * (same as v4wb)
 */
 */
	.align	5
ENTRY(feroceon_dma_inv_range)
ENTRY(feroceon_dma_inv_range)
	tst	r0, #CACHE_DLINESIZE - 1
	tst	r0, #CACHE_DLINESIZE - 1
	mcrne	p15, 0, r0, c7, c10, 1		@ clean D entry
	mcrne	p15, 0, r0, c7, c10, 1		@ clean D entry
@@ -241,6 +246,7 @@ ENTRY(feroceon_dma_inv_range)
 *
 *
 * (same as v4wb)
 * (same as v4wb)
 */
 */
	.align	5
ENTRY(feroceon_dma_clean_range)
ENTRY(feroceon_dma_clean_range)
	bic	r0, r0, #CACHE_DLINESIZE - 1
	bic	r0, r0, #CACHE_DLINESIZE - 1
1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
@@ -258,10 +264,10 @@ ENTRY(feroceon_dma_clean_range)
 *	- start	- virtual start address
 *	- start	- virtual start address
 *	- end	- virtual end address
 *	- end	- virtual end address
 */
 */
	.align	5
ENTRY(feroceon_dma_flush_range)
ENTRY(feroceon_dma_flush_range)
	bic	r0, r0, #CACHE_DLINESIZE - 1
	bic	r0, r0, #CACHE_DLINESIZE - 1
1:
1:	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
	mcr	p15, 0, r0, c7, c14, 1		@ clean+invalidate D entry
	add	r0, r0, #CACHE_DLINESIZE
	add	r0, r0, #CACHE_DLINESIZE
	cmp	r0, r1
	cmp	r0, r1
	blo	1b
	blo	1b
@@ -279,6 +285,7 @@ ENTRY(feroceon_cache_fns)
	.long	feroceon_dma_clean_range
	.long	feroceon_dma_clean_range
	.long	feroceon_dma_flush_range
	.long	feroceon_dma_flush_range


	.align	5
ENTRY(cpu_feroceon_dcache_clean_area)
ENTRY(cpu_feroceon_dcache_clean_area)
1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
1:	mcr	p15, 0, r0, c7, c10, 1		@ clean D entry
	add	r0, r0, #CACHE_DLINESIZE
	add	r0, r0, #CACHE_DLINESIZE
@@ -433,7 +440,7 @@ __feroceon_old_id_proc_info:
	.long	cpu_feroceon_name
	.long	cpu_feroceon_name
	.long	feroceon_processor_functions
	.long	feroceon_processor_functions
	.long	v4wbi_tlb_fns
	.long	v4wbi_tlb_fns
	.long	v4wb_user_fns
	.long	feroceon_user_fns
	.long	feroceon_cache_fns
	.long	feroceon_cache_fns
	.size	__feroceon_old_id_proc_info, . - __feroceon_old_id_proc_info
	.size	__feroceon_old_id_proc_info, . - __feroceon_old_id_proc_info
#endif
#endif
@@ -459,6 +466,6 @@ __feroceon_proc_info:
	.long	cpu_feroceon_name
	.long	cpu_feroceon_name
	.long	feroceon_processor_functions
	.long	feroceon_processor_functions
	.long	v4wbi_tlb_fns
	.long	v4wbi_tlb_fns
	.long	v4wb_user_fns
	.long	feroceon_user_fns
	.long	feroceon_cache_fns
	.long	feroceon_cache_fns
	.size	__feroceon_proc_info, . - __feroceon_proc_info
	.size	__feroceon_proc_info, . - __feroceon_proc_info
+8 −0
Original line number Original line Diff line number Diff line
@@ -71,6 +71,14 @@
# endif
# endif
#endif
#endif


#ifdef CONFIG_CPU_COPY_FEROCEON
# ifdef _USER
#  define MULTI_USER 1
# else
#  define _USER feroceon
# endif
#endif

#ifdef CONFIG_CPU_SA1100
#ifdef CONFIG_CPU_SA1100
# ifdef _USER
# ifdef _USER
#  define MULTI_USER 1
#  define MULTI_USER 1