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Commit 9bf163f8 authored by Alexander Graf's avatar Alexander Graf
Browse files

KVM: PPC: Book3S HV: Fix ABIv2 on LE 



For code that doesn't live in modules we can just branch to the real function
names, giving us compatibility with ABIv1 and ABIv2.

Do this for the compiled-in code of HV KVM.

Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
parent 76d072fb

arch/powerpc/kvm/book3s_hv_rmhandlers.S

+8 −8
Original line number Diff line number Diff line
@@ -668,9 +668,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_TM) 


	mr	r31, r4

	addi	r3, r31, VCPU_FPRS_TM

	bl	.load_fp_state

	bl	load_fp_state

	addi	r3, r31, VCPU_VRS_TM

	bl	.load_vr_state

	bl	load_vr_state

	mr	r4, r31

	lwz	r7, VCPU_VRSAVE_TM(r4)

	mtspr	SPRN_VRSAVE, r7
@@ -1414,9 +1414,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_TM) 


	/* Save FP/VSX. */

	addi	r3, r9, VCPU_FPRS_TM

	bl	.store_fp_state

	bl	store_fp_state

	addi	r3, r9, VCPU_VRS_TM

	bl	.store_vr_state

	bl	store_vr_state

	mfspr	r6, SPRN_VRSAVE

	stw	r6, VCPU_VRSAVE_TM(r9)

1:
@@ -2430,11 +2430,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX) 
	mtmsrd	r8

	isync

	addi	r3,r3,VCPU_FPRS

	bl	.store_fp_state

	bl	store_fp_state

#ifdef CONFIG_ALTIVEC

BEGIN_FTR_SECTION

	addi	r3,r31,VCPU_VRS

	bl	.store_vr_state

	bl	store_vr_state

END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)

#endif

	mfspr	r6,SPRN_VRSAVE
@@ -2466,11 +2466,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX) 
	mtmsrd	r8

	isync

	addi	r3,r4,VCPU_FPRS

	bl	.load_fp_state

	bl	load_fp_state

#ifdef CONFIG_ALTIVEC

BEGIN_FTR_SECTION

	addi	r3,r31,VCPU_VRS

	bl	.load_vr_state

	bl	load_vr_state

END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)

#endif

	lwz	r7,VCPU_VRSAVE(r31)