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Commit 9ae6f740 authored by Thomas Petazzoni's avatar Thomas Petazzoni Committed by Arnd Bergmann
Browse files

arm: mach-mvebu: add support for Armada 370 and Armada XP with DT 



[ben.dooks@codethink.co.uk: ensure error check on of_property_read_u32]
[ben.dooks@codethink.co.uk: use mpic address instead of bus-unit's ]
[ben.dooks@codethink.co.uk: BUG_ON() if the of_iomap() fails for mpic]
[ben.dooks@codethink.co.uk: move mpic per-cpu register base ]
[ben.dooks@codethink.co.uk: number fetch should use irqd_to_hwirq()]

Signed-off-by: default avatarGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: default avatarLior Amsalem <alior@marvell.com>
Signed-off-by: default avatarBen Dooks <ben.dooks@codethink.co.uk>
Acked-by: default avatarAndrew Lunn <andrew@lunn.ch>
Tested-by: default avatarYehuda Yitschak <yehuday@marvell.com>
Tested-by: default avatarLior Amsalem <alior@marvell.com>
parent 31af49db

arch/arm/boot/dts/armada-370-db.dts

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/*

 * Device Tree file for Marvell Armada 370 evaluation board

 * (DB-88F6710-BP-DDR3)

 *

 *  Copyright (C) 2012 Marvell

 *

 * Lior Amsalem <alior@marvell.com>

 * Gregory CLEMENT <gregory.clement@free-electrons.com>

 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2.  This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */



/dts-v1/;

/include/ "armada-370.dtsi"



/ {

	model = "Marvell Armada 370 Evaluation Board";

	compatible = "marvell,a370-db", "marvell,armada370", "marvell,armada-370-xp";



	chosen {

		bootargs = "console=ttyS0,115200 earlyprintk";

	};



	memory {

		device_type = "memory";

		reg = <0x00000000 0x20000000>; /* 512 MB */

	};



	soc {

		serial@d0012000 {

			clock-frequency = <200000000>;

			status = "okay";

		};

		timer@d0020300 {

			clock-frequency = <600000000>;

			status = "okay";

		};

	};

};

arch/arm/boot/dts/armada-370-xp.dtsi

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/*

 * Device Tree Include file for Marvell Armada 370 and Armada XP SoC

 *

 * Copyright (C) 2012 Marvell

 *

 * Lior Amsalem <alior@marvell.com>

 * Gregory CLEMENT <gregory.clement@free-electrons.com>

 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

 * Ben Dooks <ben.dooks@codethink.co.uk>

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2.  This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 *

 * This file contains the definitions that are common to the Armada

 * 370 and Armada XP SoC.

 */



/include/ "skeleton.dtsi"



/ {

	model = "Marvell Armada 370 and XP SoC";

	compatible = "marvell,armada_370_xp";



	cpus {

		cpu@0 {

			compatible = "marvell,sheeva-v7";

		};

	};



	mpic: interrupt-controller@d0020000 {

	      compatible = "marvell,mpic";

	      #interrupt-cells = <1>;

	      #address-cells = <1>;

	      #size-cells = <1>;

	      interrupt-controller;

	};



	soc {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "simple-bus";

		interrupt-parent = <&mpic>;

		ranges;



		serial@d0012000 {

				compatible = "ns16550";

				reg = <0xd0012000 0x100>;

				reg-shift = <2>;

				interrupts = <41>;

				status = "disabled";

		};

		serial@d0012100 {

				compatible = "ns16550";

				reg = <0xd0012100 0x100>;

				reg-shift = <2>;

				interrupts = <42>;

				status = "disabled";

		};



		timer@d0020300 {

			       compatible = "marvell,armada-370-xp-timer";

			       reg = <0xd0020300 0x30>;

			       interrupts = <37>, <38>, <39>, <40>;

		};

	};

};

arch/arm/boot/dts/armada-370.dtsi

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/*

 * Device Tree Include file for Marvell Armada 370 family SoC

 *

 * Copyright (C) 2012 Marvell

 *

 * Lior Amsalem <alior@marvell.com>

 * Gregory CLEMENT <gregory.clement@free-electrons.com>

 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2.  This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 *

 * Contains definitions specific to the Armada 370 SoC that are not

 * common to all Armada SoCs.

 */



/include/ "armada-370-xp.dtsi"



/ {

	model = "Marvell Armada 370 family SoC";

	compatible = "marvell,armada370", "marvell,armada-370-xp";



	mpic: interrupt-controller@d0020000 {

	      reg = <0xd0020a00 0x1d0>,

		    <0xd0021870 0x58>;

	};



	soc {

		system-controller@d0018200 {

				compatible = "marvell,armada-370-xp-system-controller";

				reg = <0xd0018200 0x100>;

		};

	};

};

arch/arm/boot/dts/armada-xp-db.dts

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/*

 * Device Tree file for Marvell Armada XP evaluation board

 * (DB-78460-BP)

 *

 * Copyright (C) 2012 Marvell

 *

 * Lior Amsalem <alior@marvell.com>

 * Gregory CLEMENT <gregory.clement@free-electrons.com>

 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2.  This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 */



/dts-v1/;

/include/ "armada-xp.dtsi"



/ {

	model = "Marvell Armada XP Evaluation Board";

	compatible = "marvell,axp-db", "marvell,armadaxp", "marvell,armada-370-xp";



	chosen {

		bootargs = "console=ttyS0,115200 earlyprintk";

	};



	memory {

		device_type = "memory";

		reg = <0x00000000 0x80000000>; /* 2 GB */

	};



	soc {

		serial@d0012000 {

			clock-frequency = <250000000>;

			status = "okay";

		};

		serial@d0012100 {

			clock-frequency = <250000000>;

			status = "okay";

		};

		serial@d0012200 {

			clock-frequency = <250000000>;

			status = "okay";

		};

		serial@d0012300 {

			clock-frequency = <250000000>;

			status = "okay";

		};

	};

};

arch/arm/boot/dts/armada-xp.dtsi

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/*

 * Device Tree Include file for Marvell Armada XP family SoC

 *

 * Copyright (C) 2012 Marvell

 *

 * Lior Amsalem <alior@marvell.com>

 * Gregory CLEMENT <gregory.clement@free-electrons.com>

 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>

 * Ben Dooks <ben.dooks@codethink.co.uk>

 *

 * This file is licensed under the terms of the GNU General Public

 * License version 2.  This program is licensed "as is" without any

 * warranty of any kind, whether express or implied.

 *

 * Contains definitions specific to the Armada 370 SoC that are not

 * common to all Armada SoCs.

 */



/include/ "armada-370-xp.dtsi"



/ {

	model = "Marvell Armada XP family SoC";

	compatible = "marvell,armadaxp", "marvell,armada-370-xp";



	mpic: interrupt-controller@d0020000 {

	      reg = <0xd0020a00 0x1d0>,

		    <0xd0021870 0x58>;

	};



	soc {

		serial@d0012200 {

				compatible = "ns16550";

				reg = <0xd0012200 0x100>;

				reg-shift = <2>;

				interrupts = <43>;

				status = "disabled";

		};

		serial@d0012300 {

				compatible = "ns16550";

				reg = <0xd0012300 0x100>;

				reg-shift = <2>;

				interrupts = <44>;

				status = "disabled";

		};



		timer@d0020300 {

				marvell,timer-25Mhz;

		};



		system-controller@d0018200 {

				compatible = "marvell,armada-370-xp-system-controller";

				reg = <0xd0018200 0x500>;

		};

	};

};