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Commit 89e5c085 authored by Gabriel FERNANDEZ's avatar Gabriel FERNANDEZ Committed by Maxime Coquelin
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ARM: STi: DT: STiH407: 407 DT Entry for clockgenA9 



Patch adds DT entries for clockgen A9

Signed-off-by: default avatarGabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: default avatarOlivier Bideau <olivier.bideau@st.com>
Signed-off-by: default avatarMaxime Coquelin <maxime.coquelin@st.com>
parent 6e67a510

arch/arm/boot/dts/stih407-clock.dtsi

+52 −3
Original line number Diff line number Diff line
@@ -24,10 +24,59 @@ 
		/*

		 * ARM Peripheral clock for timers

		 */

		arm_periph_clk: arm-periph-clk {

		arm_periph_clk: clk-m-a9-periphs {

			#clock-cells = <0>;

			compatible = "fixed-clock";

			clock-frequency = <600000000>;

			compatible = "fixed-factor-clock";



			clocks = <&clk_m_a9>;

			clock-div = <2>;

			clock-mult = <1>;

		};



		/*

		 * A9 PLL.

		 */

		clockgen-a9@92b0000 {

			compatible = "st,clkgen-c32";

			reg = <0x92b0000 0xffff>;



			clockgen_a9_pll: clockgen-a9-pll {

				#clock-cells = <1>;

				compatible = "st,stih407-plls-c32-a9", "st,clkgen-plls-c32";



				clocks = <&clk_sysin>;



				clock-output-names = "clockgen-a9-pll-odf";

			};

		};



		/*

		 * ARM CPU related clocks.

		 */

		clk_m_a9: clk-m-a9@92b0000 {

			#clock-cells = <0>;

			compatible = "st,stih407-clkgen-a9-mux", "st,clkgen-mux";

			reg = <0x92b0000 0x10000>;



			clocks = <&clockgen_a9_pll 0>,

				 <&clockgen_a9_pll 0>,

				 <&clk_s_c0_flexgen 13>,

				 <&clk_m_a9_ext2f_div2>;

		};



		/*

		 * ARM Peripheral clock for timers

		 */

		clk_m_a9_ext2f_div2: clk-m-a9-ext2f-div2s {

			#clock-cells = <0>;

			compatible = "fixed-factor-clock";



			clocks = <&clk_s_c0_flexgen 13>;



			clock-output-names = "clk-m-a9-ext2f-div2";



			clock-div = <2>;

			clock-mult = <1>;

		};



		/*