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Commit 849ad9d8 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'tegra-cleanups' of... 

Merge tag 'tegra-cleanups' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra into tegra/cleanups

Minor fixes that weren't urgent enough to go into 3.3. The two paz00
patches are in mainline already but got merged after the branch point
for this branch, so they're duplicated. I also ended up merging in
rmk/for-armsoc into this later on to fix a bug introduced by it, so it's
included but it's not the base of this branch.

* tag 'tegra-cleanups' of git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra

:
  ARM: tegra: Enable CPUIdle on Tegra20
  ARM: tegra: export usb phy symbols
  ARM: tegra: build localtimer support only when needed
  ARM: tegra: select CPU_FREQ_TABLE
  ARM: tegra: select required CPU and L2 errata options
  ARM: tegra: paz00: fix wrong UART port on mini-pcie plug
  ARM: tegra: paz00: fix wrong SD1 power gpio

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 61b80086 f6a1ba67

arch/arm/boot/dts/tegra-paz00.dts

+3 −3
Original line number Original line Diff line number Diff line
@@ -46,11 +46,11 @@ 
	};

	};





	serial@70006200 {

	serial@70006200 {

		status = "disable";

		clock-frequency = <216000000>;

	};

	};





	serial@70006300 {

	serial@70006300 {

		clock-frequency = <216000000>;

		status = "disable";

	};

	};





	serial@70006400 {

	serial@70006400 {
@@ -60,7 +60,7 @@ 
	sdhci@c8000000 {

	sdhci@c8000000 {

		cd-gpios = <&gpio 173 0>; /* gpio PV5 */

		cd-gpios = <&gpio 173 0>; /* gpio PV5 */

		wp-gpios = <&gpio 57 0>;  /* gpio PH1 */

		wp-gpios = <&gpio 57 0>;  /* gpio PH1 */

		power-gpios = <&gpio 155 0>; /* gpio PT3 */

		power-gpios = <&gpio 169 0>; /* gpio PV1 */

	};

	};





	sdhci@c8000200 {

	sdhci@c8000200 {

arch/arm/mach-tegra/Kconfig

+14 −0
Original line number Original line Diff line number Diff line
@@ -10,6 +10,14 @@ config ARCH_TEGRA_2x_SOC 
	select USB_ARCH_HAS_EHCI if USB_SUPPORT

	select USB_ARCH_HAS_EHCI if USB_SUPPORT

	select USB_ULPI if USB_SUPPORT

	select USB_ULPI if USB_SUPPORT

	select USB_ULPI_VIEWPORT if USB_SUPPORT

	select USB_ULPI_VIEWPORT if USB_SUPPORT

	select ARM_ERRATA_720789

	select ARM_ERRATA_742230

	select ARM_ERRATA_751472

	select ARM_ERRATA_754327

	select ARM_ERRATA_764369

	select PL310_ERRATA_727915 if CACHE_L2X0

	select PL310_ERRATA_769419 if CACHE_L2X0

	select CPU_FREQ_TABLE if CPU_FREQ

	help

	help

	  Support for NVIDIA Tegra AP20 and T20 processors, based on the

	  Support for NVIDIA Tegra AP20 and T20 processors, based on the

	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller

	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
@@ -23,6 +31,12 @@ config ARCH_TEGRA_3x_SOC 
	select USB_ULPI if USB_SUPPORT

	select USB_ULPI if USB_SUPPORT

	select USB_ULPI_VIEWPORT if USB_SUPPORT

	select USB_ULPI_VIEWPORT if USB_SUPPORT

	select USE_OF

	select USE_OF

	select ARM_ERRATA_743622

	select ARM_ERRATA_751472

	select ARM_ERRATA_754322

	select ARM_ERRATA_764369

	select PL310_ERRATA_769419 if CACHE_L2X0

	select CPU_FREQ_TABLE if CPU_FREQ

	help

	help

	  Support for NVIDIA Tegra T30 processor family, based on the

	  Support for NVIDIA Tegra T30 processor family, based on the

	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller

	  ARM CortexA9MP CPU and the ARM PL310 L2 cache controller

arch/arm/mach-tegra/Makefile

+2 −1
Original line number Original line Diff line number Diff line
@@ -13,7 +13,8 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += tegra2_emc.o 
obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= pinmux-tegra20-tables.o

obj-$(CONFIG_ARCH_TEGRA_2x_SOC)		+= pinmux-tegra20-tables.o

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= pinmux-tegra30-tables.o

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= pinmux-tegra30-tables.o

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= board-dt-tegra30.o

obj-$(CONFIG_ARCH_TEGRA_3x_SOC)		+= board-dt-tegra30.o

obj-$(CONFIG_SMP)                       += platsmp.o localtimer.o headsmp.o

obj-$(CONFIG_SMP)			+= platsmp.o headsmp.o

obj-$(CONFIG_LOCAL_TIMERS)		+= localtimer.o

obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o

obj-$(CONFIG_HOTPLUG_CPU)               += hotplug.o

obj-$(CONFIG_TEGRA_SYSTEM_DMA)		+= dma.o

obj-$(CONFIG_TEGRA_SYSTEM_DMA)		+= dma.o

obj-$(CONFIG_CPU_FREQ)                  += cpu-tegra.o

obj-$(CONFIG_CPU_FREQ)                  += cpu-tegra.o

arch/arm/mach-tegra/board-paz00.c

+4 −4
Original line number Original line Diff line number Diff line
@@ -60,9 +60,9 @@ static struct plat_serial8250_port debug_uart_platform_data[] = { 
		.uartclk	= 216000000,

		.uartclk	= 216000000,

	}, {

	}, {

		/* serial port on mini-pcie */

		/* serial port on mini-pcie */

		.membase	= IO_ADDRESS(TEGRA_UARTD_BASE),

		.membase	= IO_ADDRESS(TEGRA_UARTC_BASE),

		.mapbase	= TEGRA_UARTD_BASE,

		.mapbase	= TEGRA_UARTC_BASE,

		.irq		= INT_UARTD,

		.irq		= INT_UARTC,

		.flags		= UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,

		.flags		= UPF_BOOT_AUTOCONF | UPF_FIXED_TYPE,

		.type		= PORT_TEGRA,

		.type		= PORT_TEGRA,

		.iotype		= UPIO_MEM,

		.iotype		= UPIO_MEM,
@@ -174,7 +174,7 @@ static void __init tegra_paz00_fixup(struct tag *tags, char **cmdline, 
static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {

static __initdata struct tegra_clk_init_table paz00_clk_init_table[] = {

	/* name		parent		rate		enabled */

	/* name		parent		rate		enabled */

	{ "uarta",	"pll_p",	216000000,	true },

	{ "uarta",	"pll_p",	216000000,	true },

	{ "uartd",	"pll_p",	216000000,	true },

	{ "uartc",	"pll_p",	216000000,	true },





	{ "pll_p_out4",	"pll_p",	24000000,	true },

	{ "pll_p_out4",	"pll_p",	24000000,	true },

	{ "usbd",	"clk_m",	12000000,	false },

	{ "usbd",	"clk_m",	12000000,	false },

arch/arm/mach-tegra/board-paz00.h

+1 −1
Original line number Original line Diff line number Diff line
@@ -22,7 +22,7 @@ 
/* SDCARD */

/* SDCARD */

#define TEGRA_GPIO_SD1_CD		TEGRA_GPIO_PV5

#define TEGRA_GPIO_SD1_CD		TEGRA_GPIO_PV5

#define TEGRA_GPIO_SD1_WP		TEGRA_GPIO_PH1

#define TEGRA_GPIO_SD1_WP		TEGRA_GPIO_PH1

#define TEGRA_GPIO_SD1_POWER		TEGRA_GPIO_PT3

#define TEGRA_GPIO_SD1_POWER		TEGRA_GPIO_PV1





/* ULPI */

/* ULPI */

#define TEGRA_ULPI_RST			TEGRA_GPIO_PV0

#define TEGRA_ULPI_RST			TEGRA_GPIO_PV0