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Commit 80b28791 authored by Stephen Warren's avatar Stephen Warren
Browse files

ARM: tegra: pass reset to tegra_powergate_sequence_power_up()



Tegra's clock driver now provides an implementation of the common
reset API (include/linux/reset.h). Use this instead of the old Tegra-
specific API; that will soon be removed.

Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
Acked-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-By: default avatarTerje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: default avatarThierry Reding <treding@nvidia.com>
Acked-by: default avatarThierry Reding <treding@nvidia.com>
parent ca48080a
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+5 −3
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@
#include <linux/export.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/reset.h>
#include <linux/seq_file.h>
#include <linux/spinlock.h>
#include <linux/clk/tegra.h>
@@ -144,11 +145,12 @@ int tegra_powergate_remove_clamping(int id)
}

/* Must be called with clk disabled, and returns with clk enabled */
int tegra_powergate_sequence_power_up(int id, struct clk *clk)
int tegra_powergate_sequence_power_up(int id, struct clk *clk,
					struct reset_control *rst)
{
	int ret;

	tegra_periph_reset_assert(clk);
	reset_control_assert(rst);

	ret = tegra_powergate_power_on(id);
	if (ret)
@@ -165,7 +167,7 @@ int tegra_powergate_sequence_power_up(int id, struct clk *clk)
		goto err_clamp;

	udelay(10);
	tegra_periph_reset_deassert(clk);
	reset_control_deassert(rst);

	return 0;

+4 −2
Original line number Diff line number Diff line
@@ -279,7 +279,8 @@ static int gr3d_probe(struct platform_device *pdev)
		}
	}

	err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D, gr3d->clk);
	err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D, gr3d->clk,
						gr3d->rst);
	if (err < 0) {
		dev_err(&pdev->dev, "failed to power up 3D unit\n");
		return err;
@@ -287,7 +288,8 @@ static int gr3d_probe(struct platform_device *pdev)

	if (gr3d->clk_secondary) {
		err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_3D1,
							gr3d->clk_secondary);
							gr3d->clk_secondary,
							gr3d->rst_secondary);
		if (err < 0) {
			dev_err(&pdev->dev,
				"failed to power up secondary 3D unit\n");
+2 −1
Original line number Diff line number Diff line
@@ -955,7 +955,8 @@ static int tegra_pcie_power_on(struct tegra_pcie *pcie)
	}

	err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_PCIE,
						pcie->pex_clk);
						pcie->pex_clk,
						pcie->pex_rst);
	if (err) {
		dev_err(pcie->dev, "powerup sequence failed: %d\n", err);
		return err;
+5 −2
Original line number Diff line number Diff line
@@ -19,6 +19,7 @@
#define _MACH_TEGRA_POWERGATE_H_

struct clk;
struct reset_control;

#define TEGRA_POWERGATE_CPU	0
#define TEGRA_POWERGATE_3D	1
@@ -52,7 +53,8 @@ int tegra_powergate_power_off(int id);
int tegra_powergate_remove_clamping(int id);

/* Must be called with clk disabled, and returns with clk enabled */
int tegra_powergate_sequence_power_up(int id, struct clk *clk);
int tegra_powergate_sequence_power_up(int id, struct clk *clk,
				      struct reset_control *rst);
#else
static inline int tegra_powergate_is_powered(int id)
{
@@ -74,7 +76,8 @@ static inline int tegra_powergate_remove_clamping(int id)
	return -ENOSYS;
}

static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk)
static inline int tegra_powergate_sequence_power_up(int id, struct clk *clk,
						    struct reset_control *rst);
{
	return -ENOSYS;
}