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Commit 7eca30ae authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'at91-3.4-base2+cleanup' of git://github.com/at91linux/linux-at91... 

Merge branch 'at91-3.4-base2+cleanup' of git://github.com/at91linux/linux-at91 into at91/staging/base2+cleanup

* 'at91-3.4-base2+cleanup' of git://github.com/at91linux/linux-at91

: (20 commits)
  ARM: at91: properly sort dtb files in Makefile.boot
  ARM: at91: add at91sam9g25ek.dts in Makefile.boot
  ARM: at91/board-dt: drop default console
  Atmel: move console default platform_device to serial driver
  ARM: at91: merge SRAM Memory banks thanks to mirroring
  ARM: at91: finally drop at91_sys_read/write
  ARM: at91/rtc-at91sam9: pass the GPBR to use via resources
  ARM: at91:rtc/rtc-at91sam9: ioremap register bank
  ARM: at91/rtc-at91sam9: each SoC can select the RTT device to use
  ARM: at91/PMC: make register base soc independent
  ARM: at91/PMC: move assignment out of printf
  ARM: at91/pm_slowclock: add runtime detection of memory contoller
  ARM: at91: make sdram/ddr register base soc independent
  ARM: at91: move at91rm9200 sdramc defines to at91rm9200_sdramc.h
  ARM: at91/pm_slowclock: function slow_clock() accepts parameters
  ARM: at91/pm_slowclock: rename register to named define
  ARM: at91/ST: remove not needed casts
  ARM: at91: make ST (System Timer) soc independent
  ARM: at91: make matrix register base soc independent
  ARM: at91/at91x40: remove use of at91_sys_read/write

Based on top of the at91/9x5, rmk/for-armsoc, at91/device-board,
at91/pm_cleanup and at91/base.

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d65b4e98 d5e5a7f9

Documentation/feature-removal-schedule.txt

+0 −14
Original line number Diff line number Diff line
@@ -510,17 +510,3 @@ Why: The pci_scan_bus_parented() interface creates a new root bus. The 
	convert to using pci_scan_root_bus() so they can supply a list of

	bus resources when the bus is created.

Who:	Bjorn Helgaas <bhelgaas@google.com>
 


----------------------------



What:	The CAP9 SoC family will be removed

When:	3.4

Files:	arch/arm/mach-at91/at91cap9.c

	arch/arm/mach-at91/at91cap9_devices.c

	arch/arm/mach-at91/include/mach/at91cap9.h

	arch/arm/mach-at91/include/mach/at91cap9_matrix.h

	arch/arm/mach-at91/include/mach/at91cap9_ddrsdr.h

	arch/arm/mach-at91/board-cap9adk.c

Why:	The code is not actively maintained and platforms are now hard to find.

Who:	Nicolas Ferre <nicolas.ferre@atmel.com>

	Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

arch/arm/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -324,7 +324,7 @@ config ARCH_AT91 
	select CLKDEV_LOOKUP

	help

	  This enables support for systems based on the Atmel AT91RM9200,

	  AT91SAM9 and AT91CAP9 processors.

	  AT91SAM9 processors.



config ARCH_BCMRING

	bool "Broadcom BCMRING"

arch/arm/Kconfig.debug

+79 −79
Original line number Diff line number Diff line
@@ -81,47 +81,14 @@ choice 
	prompt "Kernel low-level debugging port"

	depends on DEBUG_LL



	config DEBUG_LL_UART_NONE

		bool "No low-level debugging UART"

		help

		  Say Y here if your platform doesn't provide a UART option

		  below. This relies on your platform choosing the right UART

		  definition internally in order for low-level debugging to

		  work.



	config DEBUG_ICEDCC

		bool "Kernel low-level debugging via EmbeddedICE DCC channel"

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the EmbeddedICE macrocell's DCC channel using

		  co-processor 14. This is known to work on the ARM9 style ICE

		  channel and on the XScale with the PEEDI.



		  Note that the system will appear to hang during boot if there

		  is nothing connected to read from the DCC.



	config AT91_DEBUG_LL_DBGU0

		bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl"

		depends on HAVE_AT91_DBGU0



	config AT91_DEBUG_LL_DBGU1

		bool "Kernel low-level debugging on 9263, 9g45 and cap9"

		bool "Kernel low-level debugging on 9263 and 9g45"

		depends on HAVE_AT91_DBGU1



	config DEBUG_FOOTBRIDGE_COM1

		bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"

		depends on FOOTBRIDGE

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the 8250 at PCI COM1.



	config DEBUG_DC21285_PORT

		bool "Kernel low-level debugging messages via footbridge serial port"

		depends on FOOTBRIDGE

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the serial port in the DC21285 (Footbridge).



	config DEBUG_CLPS711X_UART1

		bool "Kernel low-level debugging messages via UART1"

		depends on ARCH_CLPS711X
@@ -136,6 +103,20 @@ choice 
		  Say Y here if you want the debug print routines to direct

		  their output to the second serial port on these devices.



	config DEBUG_DC21285_PORT

		bool "Kernel low-level debugging messages via footbridge serial port"

		depends on FOOTBRIDGE

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the serial port in the DC21285 (Footbridge).



	config DEBUG_FOOTBRIDGE_COM1

		bool "Kernel low-level debugging messages via footbridge 8250 at PCI COM1"

		depends on FOOTBRIDGE

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the 8250 at PCI COM1.



	config DEBUG_HIGHBANK_UART

		bool "Kernel low-level debugging messages via Highbank UART"

		depends on ARCH_HIGHBANK
@@ -206,38 +187,42 @@ choice 
		  Say Y here if you want kernel low-level debugging support

		  on i.MX6Q.



	config DEBUG_S3C_UART0

		depends on PLAT_SAMSUNG

		bool "Use S3C UART 0 for low-level debug"

	config DEBUG_MSM_UART1

		bool "Kernel low-level debugging messages via MSM UART1"

		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50

		help

		  Say Y here if you want the debug print routines to direct

		  their output to UART 0. The port must have been initialised

		  by the boot-loader before use.



		  The uncompressor code port configuration is now handled

		  by CONFIG_S3C_LOWLEVEL_UART_PORT.

		  their output to the first serial port on MSM devices.



	config DEBUG_S3C_UART1

		depends on PLAT_SAMSUNG

		bool "Use S3C UART 1 for low-level debug"

	config DEBUG_MSM_UART2

		bool "Kernel low-level debugging messages via MSM UART2"

		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50

		help

		  Say Y here if you want the debug print routines to direct

		  their output to UART 1. The port must have been initialised

		  by the boot-loader before use.

		  their output to the second serial port on MSM devices.



		  The uncompressor code port configuration is now handled

		  by CONFIG_S3C_LOWLEVEL_UART_PORT.

	config DEBUG_MSM_UART3

		bool "Kernel low-level debugging messages via MSM UART3"

		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the third serial port on MSM devices.



	config DEBUG_S3C_UART2

		depends on PLAT_SAMSUNG

		bool "Use S3C UART 2 for low-level debug"

	config DEBUG_MSM8660_UART

		bool "Kernel low-level debugging messages via MSM 8660 UART"

		depends on ARCH_MSM8X60

		select MSM_HAS_DEBUG_UART_HS

		help

		  Say Y here if you want the debug print routines to direct

		  their output to UART 2. The port must have been initialised

		  by the boot-loader before use.

		  their output to the serial port on MSM 8660 devices.



		  The uncompressor code port configuration is now handled

		  by CONFIG_S3C_LOWLEVEL_UART_PORT.

	config DEBUG_MSM8960_UART

		bool "Kernel low-level debugging messages via MSM 8960 UART"

		depends on ARCH_MSM8960

		select MSM_HAS_DEBUG_UART_HS

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the serial port on MSM 8960 devices.



	config DEBUG_REALVIEW_STD_PORT

		bool "RealView Default UART"
@@ -255,42 +240,57 @@ choice 
		  their output to the standard serial port on the RealView

		  PB1176 platform.



	config DEBUG_MSM_UART1

		bool "Kernel low-level debugging messages via MSM UART1"

		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50

	config DEBUG_S3C_UART0

		depends on PLAT_SAMSUNG

		bool "Use S3C UART 0 for low-level debug"

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the first serial port on MSM devices.

		  their output to UART 0. The port must have been initialised

		  by the boot-loader before use.



	config DEBUG_MSM_UART2

		bool "Kernel low-level debugging messages via MSM UART2"

		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50

		  The uncompressor code port configuration is now handled

		  by CONFIG_S3C_LOWLEVEL_UART_PORT.



	config DEBUG_S3C_UART1

		depends on PLAT_SAMSUNG

		bool "Use S3C UART 1 for low-level debug"

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the second serial port on MSM devices.

		  their output to UART 1. The port must have been initialised

		  by the boot-loader before use.



	config DEBUG_MSM_UART3

		bool "Kernel low-level debugging messages via MSM UART3"

		depends on ARCH_MSM7X00A || ARCH_MSM7X30 || ARCH_QSD8X50

		  The uncompressor code port configuration is now handled

		  by CONFIG_S3C_LOWLEVEL_UART_PORT.



	config DEBUG_S3C_UART2

		depends on PLAT_SAMSUNG

		bool "Use S3C UART 2 for low-level debug"

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the third serial port on MSM devices.

		  their output to UART 2. The port must have been initialised

		  by the boot-loader before use.



	config DEBUG_MSM8660_UART

		bool "Kernel low-level debugging messages via MSM 8660 UART"

		depends on ARCH_MSM8X60

		select MSM_HAS_DEBUG_UART_HS

		  The uncompressor code port configuration is now handled

		  by CONFIG_S3C_LOWLEVEL_UART_PORT.



	config DEBUG_LL_UART_NONE

		bool "No low-level debugging UART"

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the serial port on MSM 8660 devices.

		  Say Y here if your platform doesn't provide a UART option

		  below. This relies on your platform choosing the right UART

		  definition internally in order for low-level debugging to

		  work.



	config DEBUG_MSM8960_UART

		bool "Kernel low-level debugging messages via MSM 8960 UART"

		depends on ARCH_MSM8960

		select MSM_HAS_DEBUG_UART_HS

	config DEBUG_ICEDCC

		bool "Kernel low-level debugging via EmbeddedICE DCC channel"

		help

		  Say Y here if you want the debug print routines to direct

		  their output to the serial port on MSM 8960 devices.

		  their output to the EmbeddedICE macrocell's DCC channel using

		  co-processor 14. This is known to work on the ARM9 style ICE

		  channel and on the XScale with the PEEDI.



		  Note that the system will appear to hang during boot if there

		  is nothing connected to read from the DCC.



endchoice

arch/arm/boot/dts/at91sam9g25ek.dts

0 → 100644
+37 −0
Original line number Diff line number Diff line 
/*

 * at91sam9g25ek.dts - Device Tree file for AT91SAM9G25-EK board

 *

 *  Copyright (C) 2012 Atmel,

 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>

 *

 * Licensed under GPLv2 or later.

 */

/dts-v1/;

/include/ "at91sam9x5.dtsi"

/include/ "at91sam9x5cm.dtsi"



/ {

	model = "Atmel AT91SAM9G25-EK";

	compatible = "atmel,at91sam9g25ek", "atmel,at91sam9x5ek", "atmel,at91sam9x5", "atmel,at91sam9";



	chosen {

		bootargs = "128M console=ttyS0,115200 mtdparts=atmel_nand:8M(bootstrap/uboot/kernel)ro,-(rootfs) root=/dev/mtdblock1 rw rootfstype=ubifs ubi.mtd=1 root=ubi0:rootfs";

	};



	ahb {

		apb {

			dbgu: serial@fffff200 {

				status = "okay";

			};



			usart0: serial@f801c000 {

				status = "okay";

			};



			macb0: ethernet@f802c000 {

				phy-mode = "rmii";

				status = "okay";

			};

		};

	};

};

arch/arm/boot/dts/at91sam9x5.dtsi

0 → 100644
+172 −0
Original line number Diff line number Diff line 
/*

 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC

 *                   applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,

 *                   AT91SAM9X25, AT91SAM9X35 SoC

 *

 *  Copyright (C) 2012 Atmel,

 *                2012 Nicolas Ferre <nicolas.ferre@atmel.com>

 *

 * Licensed under GPLv2 or later.

 */



/include/ "skeleton.dtsi"



/ {

	model = "Atmel AT91SAM9x5 family SoC";

	compatible = "atmel,at91sam9x5";

	interrupt-parent = <&aic>;



	aliases {

		serial0 = &dbgu;

		serial1 = &usart0;

		serial2 = &usart1;

		serial3 = &usart2;

		gpio0 = &pioA;

		gpio1 = &pioB;

		gpio2 = &pioC;

		gpio3 = &pioD;

		tcb0 = &tcb0;

		tcb1 = &tcb1;

	};

	cpus {

		cpu@0 {

			compatible = "arm,arm926ejs";

		};

	};



	memory@20000000 {

		reg = <0x20000000 0x10000000>;

	};



	ahb {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;



		apb {

			compatible = "simple-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			aic: interrupt-controller@fffff000 {

				#interrupt-cells = <2>;

				compatible = "atmel,at91rm9200-aic";

				interrupt-controller;

				interrupt-parent;

				reg = <0xfffff000 0x200>;

			};



			pit: timer@fffffe30 {

				compatible = "atmel,at91sam9260-pit";

				reg = <0xfffffe30 0xf>;

				interrupts = <1 4>;

			};



			tcb0: timer@f8008000 {

				compatible = "atmel,at91sam9x5-tcb";

				reg = <0xf8008000 0x100>;

				interrupts = <17 4>;

			};



			tcb1: timer@f800c000 {

				compatible = "atmel,at91sam9x5-tcb";

				reg = <0xf800c000 0x100>;

				interrupts = <17 4>;

			};



			dma0: dma-controller@ffffec00 {

				compatible = "atmel,at91sam9g45-dma";

				reg = <0xffffec00 0x200>;

				interrupts = <20 4>;

			};



			dma1: dma-controller@ffffee00 {

				compatible = "atmel,at91sam9g45-dma";

				reg = <0xffffee00 0x200>;

				interrupts = <21 4>;

			};



			pioA: gpio@fffff400 {

				compatible = "atmel,at91rm9200-gpio";

				reg = <0xfffff400 0x100>;

				interrupts = <2 4>;

				#gpio-cells = <2>;

				gpio-controller;

			};



			pioB: gpio@fffff600 {

				compatible = "atmel,at91rm9200-gpio";

				reg = <0xfffff600 0x100>;

				interrupts = <2 4>;

				#gpio-cells = <2>;

				gpio-controller;

			};



			pioC: gpio@fffff800 {

				compatible = "atmel,at91rm9200-gpio";

				reg = <0xfffff800 0x100>;

				interrupts = <3 4>;

				#gpio-cells = <2>;

				gpio-controller;

			};



			pioD: gpio@fffffa00 {

				compatible = "atmel,at91rm9200-gpio";

				reg = <0xfffffa00 0x100>;

				interrupts = <3 4>;

				#gpio-cells = <2>;

				gpio-controller;

			};



			dbgu: serial@fffff200 {

				compatible = "atmel,at91sam9260-usart";

				reg = <0xfffff200 0x200>;

				interrupts = <1 4>;

				status = "disabled";

			};



			usart0: serial@f801c000 {

				compatible = "atmel,at91sam9260-usart";

				reg = <0xf801c000 0x200>;

				interrupts = <5 4>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				status = "disabled";

			};



			usart1: serial@f8020000 {

				compatible = "atmel,at91sam9260-usart";

				reg = <0xf8020000 0x200>;

				interrupts = <6 4>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				status = "disabled";

			};



			usart2: serial@f8024000 {

				compatible = "atmel,at91sam9260-usart";

				reg = <0xf8024000 0x200>;

				interrupts = <7 4>;

				atmel,use-dma-rx;

				atmel,use-dma-tx;

				status = "disabled";

			};



			macb0: ethernet@f802c000 {

				compatible = "cdns,at32ap7000-macb", "cdns,macb";

				reg = <0xf802c000 0x100>;

				interrupts = <24 4>;

				status = "disabled";

			};



			macb1: ethernet@f8030000 {

				compatible = "cdns,at32ap7000-macb", "cdns,macb";

				reg = <0xf8030000 0x100>;

				interrupts = <27 4>;

				status = "disabled";

			};

		};

	};

};