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Commit 7dc181c2 authored by Rajkumar Manoharan's avatar Rajkumar Manoharan Committed by John W. Linville
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ath9k: Add btcoex profile management support for AR9462



AR9462 chips have the capabilities to provoide bluetooth
profile information. For non-AR9462 btcoex chips, the BT
priority traffic was identified by periodically polling
the respective registers and updated dutycycle, stomptype,
etc. As AR9462 chip offers the BT profile informations,
let us make use of that to update aggregation limit,
dutycycle, stomptype and wieghtages.

Signed-off-by: default avatarRajkumar Manoharan <rmanohar@qca.qualcomm.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 38df2f07
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+1 −0
Original line number Diff line number Diff line
@@ -240,6 +240,7 @@ enum ATH_DEBUG {
	ATH_DBG_BTCOEX		= 0x00002000,
	ATH_DBG_WMI		= 0x00004000,
	ATH_DBG_BSTUCK		= 0x00008000,
	ATH_DBG_MCI		= 0x00010000,
	ATH_DBG_ANY		= 0xffffffff
};

+1 −0
Original line number Diff line number Diff line
@@ -4,6 +4,7 @@ ath9k-y += beacon.o \
		main.o \
		recv.o \
		xmit.o \
		mci.o \

ath9k-$(CONFIG_ATH9K_RATE_CONTROL) += rc.o
ath9k-$(CONFIG_ATH9K_PCI) += pci.o
+3 −0
Original line number Diff line number Diff line
@@ -25,6 +25,7 @@

#include "debug.h"
#include "common.h"
#include "mci.h"

/*
 * Header for the ath9k.ko driver core *only* -- hw code nor any other driver
@@ -443,7 +444,9 @@ struct ath_btcoex {
	u32 btcoex_no_stomp; /* in usec */
	u32 btcoex_period; /* in usec */
	u32 btscan_no_stomp; /* in usec */
	u32 duty_cycle;
	struct ath_gen_timer *no_stomp_timer; /* Timer for no BT stomping */
	struct ath_mci_profile mci;
};

int ath_init_btcoex_timer(struct ath_softc *sc);
+4 −3
Original line number Diff line number Diff line
@@ -189,8 +189,8 @@ static void ath_btcoex_period_timer(unsigned long data)
	bool is_btscan;

	ath9k_ps_wakeup(sc);
	if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
		ath_detect_bt_priority(sc);

	is_btscan = sc->sc_flags & SC_OP_BT_SCAN;

	spin_lock_bh(&btcoex->btcoex_lock);
@@ -212,8 +212,9 @@ static void ath_btcoex_period_timer(unsigned long data)
	}

	ath9k_ps_restore(sc);
	timer_period = btcoex->btcoex_period / 1000;
	mod_timer(&btcoex->period_timer, jiffies +
				  msecs_to_jiffies(ATH_BTCOEX_DEF_BT_PERIOD));
				  msecs_to_jiffies(timer_period));
}

/*
+1 −1
Original line number Diff line number Diff line
@@ -2331,7 +2331,7 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
			ah->enabled_cals |= TX_IQ_ON_AGC_CAL;
	}
	if (AR_SREV_9462(ah))
		pCap->hw_caps |= ATH9K_HW_CAP_RTT;
		pCap->hw_caps |= ATH9K_HW_CAP_RTT | ATH9K_HW_CAP_MCI;

	return 0;
}
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