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Commit 708795cd authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'io-cleanup-for-3.4' of git://sources.calxeda.com/kernel/linux into next/cleanup2 

* 'io-cleanup-for-3.4' of git://sources.calxeda.com/kernel/linux: (22 commits)
  ARM: kill off __mem_pci
  ARM: remove bunch of now unused mach/io.h files
  ARM: make mach/io.h include optional
  ARM: clps711x: remove unneeded include of mach/io.h
  ARM: dove: add explicit include of dove.h to addr-map.c
  ARM: at91: add explicit include of hardware.h to uncompressor
  ARM: ep93xx: clean-up mach/io.h
  ARM: tegra: clean-up mach/io.h
  ARM: orion5x: clean-up mach/io.h
  ARM: davinci: remove unneeded mach/io.h include
  [media] davinci: remove includes of mach/io.h
  ARM: OMAP: Remove remaining includes for mach/io.h
  ARM: msm: clean-up mach/io.h
  ARM: iop13xx: move io.h externs to pci.h
  ARM: remove compile time __arch_ioremap/__arch_iounmap
  ARM: ebsa110: use runtime ioremap hook
  ARM: ixp4xx: use runtime ioremap hook
  ARM: iop13xx: use runtime ioremap hook
  ARM: msm: use runtime ioremap hook
  ARM: imx: convert to common runtime ioremap hook
  ...
parents d50673ed 5621caac

arch/arm/Kconfig

+23 −0
Original line number Diff line number Diff line
@@ -217,6 +217,13 @@ config ARM_PATCH_PHYS_VIRT 
	  this feature (eg, building a kernel for a single machine) and

	  you need to shrink the kernel to the minimal size.



config NEED_MACH_IO_H

	bool

	help

	  Select this when mach/io.h is required to provide special

	  definitions for this platform.  The need for mach/io.h should

	  be avoided when possible.



config NEED_MACH_MEMORY_H

	bool

	help
@@ -268,6 +275,7 @@ config ARCH_INTEGRATOR 
	select GENERIC_CLOCKEVENTS

	select PLAT_VERSATILE

	select PLAT_VERSATILE_FPGA_IRQ

	select NEED_MACH_IO_H

	select NEED_MACH_MEMORY_H

	help

	  Support for ARM's Integrator platform.
@@ -403,6 +411,7 @@ config ARCH_EBSA110 
	select ISA

	select NO_IOPORT

	select ARCH_USES_GETTIMEOFFSET

	select NEED_MACH_IO_H

	select NEED_MACH_MEMORY_H

	help

	  This is an evaluation board for the StrongARM processor available
@@ -429,6 +438,7 @@ config ARCH_FOOTBRIDGE 
	select FOOTBRIDGE

	select GENERIC_CLOCKEVENTS

	select HAVE_IDE

	select NEED_MACH_IO_H

	select NEED_MACH_MEMORY_H

	help

	  Support for systems based on the DC21285 companion chip
@@ -481,6 +491,7 @@ config ARCH_IOP13XX 
	select PCI

	select ARCH_SUPPORTS_MSI

	select VMSPLIT_1G

	select NEED_MACH_IO_H

	select NEED_MACH_MEMORY_H

	select NEED_RET_TO_USER

	help
@@ -490,6 +501,7 @@ config ARCH_IOP32X 
	bool "IOP32x-based"

	depends on MMU

	select CPU_XSCALE

	select NEED_MACH_IO_H

	select NEED_RET_TO_USER

	select PLAT_IOP

	select PCI
@@ -502,6 +514,7 @@ config ARCH_IOP33X 
	bool "IOP33x-based"

	depends on MMU

	select CPU_XSCALE

	select NEED_MACH_IO_H

	select NEED_RET_TO_USER

	select PLAT_IOP

	select PCI
@@ -515,6 +528,7 @@ config ARCH_IXP23XX 
	select CPU_XSC3

 	select PCI

	select ARCH_USES_GETTIMEOFFSET

	select NEED_MACH_IO_H

	select NEED_MACH_MEMORY_H

	help

	  Support for Intel's IXP23xx (XScale) family of processors.
@@ -525,6 +539,7 @@ config ARCH_IXP2000 
	select CPU_XSCALE

	select PCI

	select ARCH_USES_GETTIMEOFFSET

	select NEED_MACH_IO_H

	select NEED_MACH_MEMORY_H

	help

	  Support for Intel's IXP2400/2800 (XScale) family of processors.
@@ -538,6 +553,7 @@ config ARCH_IXP4XX 
	select GENERIC_CLOCKEVENTS

	select HAVE_SCHED_CLOCK

	select MIGHT_HAVE_PCI

	select NEED_MACH_IO_H

	select DMABOUNCE if PCI

	help

	  Support for Intel's IXP4XX (XScale) family of processors.
@@ -548,6 +564,7 @@ config ARCH_DOVE 
	select PCI

	select ARCH_REQUIRE_GPIOLIB

	select GENERIC_CLOCKEVENTS

	select NEED_MACH_IO_H

	select PLAT_ORION

	help

	  Support for the Marvell Dove SoC 88AP510
@@ -558,6 +575,7 @@ config ARCH_KIRKWOOD 
	select PCI

	select ARCH_REQUIRE_GPIOLIB

	select GENERIC_CLOCKEVENTS

	select NEED_MACH_IO_H

	select PLAT_ORION

	help

	  Support for the following Marvell Kirkwood series SoCs:
@@ -582,6 +600,7 @@ config ARCH_MV78XX0 
	select PCI

	select ARCH_REQUIRE_GPIOLIB

	select GENERIC_CLOCKEVENTS

	select NEED_MACH_IO_H

	select PLAT_ORION

	help

	  Support for the following Marvell MV78xx0 series SoCs:
@@ -651,6 +670,7 @@ config ARCH_TEGRA 
	select HAVE_SCHED_CLOCK

	select HAVE_SMP

	select MIGHT_HAVE_CACHE_L2X0

	select NEED_MACH_IO_H if PCI

	select ARCH_HAS_CPUFREQ

	help

	  This enables support for NVIDIA Tegra based systems (Tegra APX,
@@ -745,6 +765,7 @@ config ARCH_RPC 
	select ARCH_SPARSEMEM_ENABLE

	select ARCH_USES_GETTIMEOFFSET

	select HAVE_IDE

	select NEED_MACH_IO_H

	select NEED_MACH_MEMORY_H

	help

	  On the Acorn Risc-PC, Linux can support the internal IDE disk and
@@ -777,6 +798,7 @@ config ARCH_S3C2410 
	select CLKDEV_LOOKUP

	select ARCH_USES_GETTIMEOFFSET

	select HAVE_S3C2410_I2C if I2C

	select NEED_MACH_IO_H

	help

	  Samsung S3C2410X CPU based systems, such as the Simtec Electronics

	  BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
@@ -883,6 +905,7 @@ config ARCH_SHARK 
	select PCI

	select ARCH_USES_GETTIMEOFFSET

	select NEED_MACH_MEMORY_H

	select NEED_MACH_IO_H

	help

	  Support for the StrongARM based Digital DNARD machine, also known

	  as "Shark" (<http://www.shark-linux.de/shark.html>).

arch/arm/include/asm/io.h

+31 −38
Original line number Diff line number Diff line
@@ -83,6 +83,11 @@ extern void __iomem *__arm_ioremap_pfn(unsigned long, unsigned long, size_t, uns 
extern void __iomem *__arm_ioremap(unsigned long, size_t, unsigned int);

extern void __iomem *__arm_ioremap_exec(unsigned long, size_t, bool cached);

extern void __iounmap(volatile void __iomem *addr);

extern void __arm_iounmap(volatile void __iomem *addr);



extern void __iomem * (*arch_ioremap_caller)(unsigned long, size_t,

	unsigned int, void *);

extern void (*arch_iounmap)(volatile void __iomem *);



/*

 * Bad read/write accesses...
@@ -109,7 +114,11 @@ static inline void __iomem *__typesafe_io(unsigned long addr) 
/*

 * Now, pick up the machine-defined IO definitions

 */

#ifdef CONFIG_NEED_MACH_IO_H

#include <mach/io.h>

#else

#define __io(a)		({ (void)(a); __typesafe_io(0); })

#endif



/*

 * This is the limit of PC card/PCI/ISA IO space, which is by default
@@ -211,18 +220,18 @@ extern void _memset_io(volatile void __iomem *, int, size_t); 
 * Again, this are defined to perform little endian accesses.  See the

 * IO port primitives for more information.

 */

#ifdef __mem_pci

#define readb_relaxed(c) ({ u8  __r = __raw_readb(__mem_pci(c)); __r; })

#ifndef readl

#define readb_relaxed(c) ({ u8  __r = __raw_readb(c); __r; })

#define readw_relaxed(c) ({ u16 __r = le16_to_cpu((__force __le16) \

					__raw_readw(__mem_pci(c))); __r; })

					__raw_readw(c)); __r; })

#define readl_relaxed(c) ({ u32 __r = le32_to_cpu((__force __le32) \

					__raw_readl(__mem_pci(c))); __r; })

					__raw_readl(c)); __r; })



#define writeb_relaxed(v,c)	((void)__raw_writeb(v,__mem_pci(c)))

#define writeb_relaxed(v,c)	((void)__raw_writeb(v,c))

#define writew_relaxed(v,c)	((void)__raw_writew((__force u16) \

					cpu_to_le16(v),__mem_pci(c)))

					cpu_to_le16(v),c))

#define writel_relaxed(v,c)	((void)__raw_writel((__force u32) \

					cpu_to_le32(v),__mem_pci(c)))

					cpu_to_le32(v),c))



#define readb(c)		({ u8  __v = readb_relaxed(c); __iormb(); __v; })

#define readw(c)		({ u16 __v = readw_relaxed(c); __iormb(); __v; })
@@ -232,30 +241,19 @@ extern void _memset_io(volatile void __iomem *, int, size_t); 
#define writew(v,c)		({ __iowmb(); writew_relaxed(v,c); })

#define writel(v,c)		({ __iowmb(); writel_relaxed(v,c); })



#define readsb(p,d,l)		__raw_readsb(__mem_pci(p),d,l)

#define readsw(p,d,l)		__raw_readsw(__mem_pci(p),d,l)

#define readsl(p,d,l)		__raw_readsl(__mem_pci(p),d,l)



#define writesb(p,d,l)		__raw_writesb(__mem_pci(p),d,l)

#define writesw(p,d,l)		__raw_writesw(__mem_pci(p),d,l)

#define writesl(p,d,l)		__raw_writesl(__mem_pci(p),d,l)

#define readsb(p,d,l)		__raw_readsb(p,d,l)

#define readsw(p,d,l)		__raw_readsw(p,d,l)

#define readsl(p,d,l)		__raw_readsl(p,d,l)



#define memset_io(c,v,l)	_memset_io(__mem_pci(c),(v),(l))

#define memcpy_fromio(a,c,l)	_memcpy_fromio((a),__mem_pci(c),(l))

#define memcpy_toio(c,a,l)	_memcpy_toio(__mem_pci(c),(a),(l))

#define writesb(p,d,l)		__raw_writesb(p,d,l)

#define writesw(p,d,l)		__raw_writesw(p,d,l)

#define writesl(p,d,l)		__raw_writesl(p,d,l)



#elif !defined(readb)

#define memset_io(c,v,l)	_memset_io(c,(v),(l))

#define memcpy_fromio(a,c,l)	_memcpy_fromio((a),c,(l))

#define memcpy_toio(c,a,l)	_memcpy_toio(c,(a),(l))



#define readb(c)			(__readwrite_bug("readb"),0)

#define readw(c)			(__readwrite_bug("readw"),0)

#define readl(c)			(__readwrite_bug("readl"),0)

#define writeb(v,c)			__readwrite_bug("writeb")

#define writew(v,c)			__readwrite_bug("writew")

#define writel(v,c)			__readwrite_bug("writel")



#define check_signature(io,sig,len)	(0)



#endif	/* __mem_pci */

#endif	/* readl */



/*

 * ioremap and friends.
@@ -264,16 +262,11 @@ extern void _memset_io(volatile void __iomem *, int, size_t); 
 * Documentation/io-mapping.txt.

 *

 */

#ifndef __arch_ioremap

#define __arch_ioremap			__arm_ioremap

#define __arch_iounmap			__iounmap

#endif



#define ioremap(cookie,size)		__arch_ioremap((cookie), (size), MT_DEVICE)

#define ioremap_nocache(cookie,size)	__arch_ioremap((cookie), (size), MT_DEVICE)

#define ioremap_cached(cookie,size)	__arch_ioremap((cookie), (size), MT_DEVICE_CACHED)

#define ioremap_wc(cookie,size)		__arch_ioremap((cookie), (size), MT_DEVICE_WC)

#define iounmap				__arch_iounmap

#define ioremap(cookie,size)		__arm_ioremap((cookie), (size), MT_DEVICE)

#define ioremap_nocache(cookie,size)	__arm_ioremap((cookie), (size), MT_DEVICE)

#define ioremap_cached(cookie,size)	__arm_ioremap((cookie), (size), MT_DEVICE_CACHED)

#define ioremap_wc(cookie,size)		__arm_ioremap((cookie), (size), MT_DEVICE_WC)

#define iounmap				__arm_iounmap



/*

 * io{read,write}{8,16,32} macros

arch/arm/mach-at91/include/mach/io.h

deleted100644 → 0
+0 −31
Original line number Diff line number Diff line 
/*

 * arch/arm/mach-at91/include/mach/io.h

 *

 *  Copyright (C) 2003 SAN People

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 */



#ifndef __ASM_ARCH_IO_H

#define __ASM_ARCH_IO_H



#include <mach/hardware.h>



#define IO_SPACE_LIMIT		0xFFFFFFFF



#define __io(a)		__typesafe_io(a)

#define __mem_pci(a)	(a)



#endif

arch/arm/mach-at91/include/mach/uncompress.h

+1 −0
Original line number Diff line number Diff line
@@ -23,6 +23,7 @@ 


#include <linux/io.h>

#include <linux/atmel_serial.h>

#include <mach/hardware.h>



#if defined(CONFIG_AT91_EARLY_DBGU0)

#define UART_OFFSET AT91_BASE_DBGU0

arch/arm/mach-bcmring/include/mach/io.h

deleted100644 → 0
+0 −33
Original line number Diff line number Diff line 
/*

 *

 *  Copyright (C) 1999 ARM Limited

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program; if not, write to the Free Software

 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

 */

#ifndef __ASM_ARM_ARCH_IO_H

#define __ASM_ARM_ARCH_IO_H



#include <mach/hardware.h>



#define IO_SPACE_LIMIT 0xffffffff



/*

 * We don't actually have real ISA nor PCI buses, but there is so many

 * drivers out there that might just work if we fake them...

 */

#define __io(a)		__typesafe_io(a)

#define __mem_pci(a)	(a)



#endif