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Commit 6f733a34 authored by Paul Walmsley's avatar Paul Walmsley Committed by Tony Lindgren
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ARM: OMAP: GPIO de-bounce clocks don't affect module idle state



GPIO de-bounce clocks don't have any impact on the module idle state, so
the clock code should not wait for the module to enable after the de-bounce
clocks are enabled.

Problem found by Kevin Hilman <khilman@deeprootsystems.com>.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarKevin Hilman <khilman@deeprootsystems.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent 72af2b36
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+6 −6
Original line number Diff line number Diff line
@@ -2182,7 +2182,7 @@ static struct clk wkup_32k_fck = {

static struct clk gpio1_dbck = {
	.name		= "gpio1_dbck",
	.ops		= &clkops_omap2_dflt_wait,
	.ops		= &clkops_omap2_dflt,
	.parent		= &wkup_32k_fck,
	.enable_reg	= OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
	.enable_bit	= OMAP3430_EN_GPIO1_SHIFT,
@@ -2427,7 +2427,7 @@ static struct clk per_32k_alwon_fck = {

static struct clk gpio6_dbck = {
	.name		= "gpio6_dbck",
	.ops		= &clkops_omap2_dflt_wait,
	.ops		= &clkops_omap2_dflt,
	.parent		= &per_32k_alwon_fck,
	.enable_reg	= OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
	.enable_bit	= OMAP3430_EN_GPIO6_SHIFT,
@@ -2437,7 +2437,7 @@ static struct clk gpio6_dbck = {

static struct clk gpio5_dbck = {
	.name		= "gpio5_dbck",
	.ops		= &clkops_omap2_dflt_wait,
	.ops		= &clkops_omap2_dflt,
	.parent		= &per_32k_alwon_fck,
	.enable_reg	= OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
	.enable_bit	= OMAP3430_EN_GPIO5_SHIFT,
@@ -2447,7 +2447,7 @@ static struct clk gpio5_dbck = {

static struct clk gpio4_dbck = {
	.name		= "gpio4_dbck",
	.ops		= &clkops_omap2_dflt_wait,
	.ops		= &clkops_omap2_dflt,
	.parent		= &per_32k_alwon_fck,
	.enable_reg	= OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
	.enable_bit	= OMAP3430_EN_GPIO4_SHIFT,
@@ -2457,7 +2457,7 @@ static struct clk gpio4_dbck = {

static struct clk gpio3_dbck = {
	.name		= "gpio3_dbck",
	.ops		= &clkops_omap2_dflt_wait,
	.ops		= &clkops_omap2_dflt,
	.parent		= &per_32k_alwon_fck,
	.enable_reg	= OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
	.enable_bit	= OMAP3430_EN_GPIO3_SHIFT,
@@ -2467,7 +2467,7 @@ static struct clk gpio3_dbck = {

static struct clk gpio2_dbck = {
	.name		= "gpio2_dbck",
	.ops		= &clkops_omap2_dflt_wait,
	.ops		= &clkops_omap2_dflt,
	.parent		= &per_32k_alwon_fck,
	.enable_reg	= OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
	.enable_bit	= OMAP3430_EN_GPIO2_SHIFT,