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Commit 6b5de091 authored by R Sricharan's avatar R Sricharan Committed by Santosh Shilimkar
Browse files

arm/dts: OMAP5: Add omap5 dts files 



Adding the minimum device tree files required for
OMAP5 to boot.

Reviewed-by: default avatarBenoit Cousson <b-cousson@ti.com>
Signed-off-by: default avatarR Sricharan <r.sricharan@ti.com>
Signed-off-by: default avatarSantosh Shilimkar <santosh.shilimkar@ti.com>
parent 0c1b6fac

arch/arm/boot/dts/omap5-evm.dts

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/*

 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */

/dts-v1/;



/include/ "omap5.dtsi"



/ {

	model = "TI OMAP5 EVM board";

	compatible = "ti,omap5-evm", "ti,omap5";



	memory {

		device_type = "memory";

		reg = <0x80000000 0x40000000>; /* 1 GB */

	};

};

arch/arm/boot/dts/omap5.dtsi

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/*

 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 * Based on "omap4.dtsi"

 */



/*

 * Carveout for multimedia usecases

 * It should be the last 48MB of the first 512MB memory part

 * In theory, it should not even exist. That zone should be reserved

 * dynamically during the .reserve callback.

 */

/memreserve/ 0x9d000000 0x03000000;



/include/ "skeleton.dtsi"



/ {

	compatible = "ti,omap5";

	interrupt-parent = <&gic>;



	aliases {

		serial0 = &uart1;

		serial1 = &uart2;

		serial2 = &uart3;

		serial3 = &uart4;

		serial4 = &uart5;

		serial5 = &uart6;

	};



	cpus {

		cpu@0 {

			compatible = "arm,cortex-a15";

		};

		cpu@1 {

			compatible = "arm,cortex-a15";

		};

	};



	/*

	 * The soc node represents the soc top level view. It is uses for IPs

	 * that are not memory mapped in the MPU view or for the MPU itself.

	 */

	soc {

		compatible = "ti,omap-infra";

		mpu {

			compatible = "ti,omap5-mpu";

			ti,hwmods = "mpu";

		};

	};



	/*

	 * XXX: Use a flat representation of the OMAP3 interconnect.

	 * The real OMAP interconnect network is quite complex.

	 * Since that will not bring real advantage to represent that in DT for

	 * the moment, just use a fake OCP bus entry to represent the whole bus

	 * hierarchy.

	 */

	ocp {

		compatible = "ti,omap4-l3-noc", "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges;

		ti,hwmods = "l3_main_1", "l3_main_2", "l3_main_3";



		gic: interrupt-controller@48211000 {

			compatible = "arm,cortex-a15-gic";

			interrupt-controller;

			#interrupt-cells = <3>;

			reg = <0x48211000 0x1000>,

			      <0x48212000 0x1000>;

		};



		gpio1: gpio@4ae10000 {

			compatible = "ti,omap4-gpio";

			ti,hwmods = "gpio1";

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <1>;

		};



		gpio2: gpio@48055000 {

			compatible = "ti,omap4-gpio";

			ti,hwmods = "gpio2";

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <1>;

		};



		gpio3: gpio@48057000 {

			compatible = "ti,omap4-gpio";

			ti,hwmods = "gpio3";

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <1>;

		};



		gpio4: gpio@48059000 {

			compatible = "ti,omap4-gpio";

			ti,hwmods = "gpio4";

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <1>;

		};



		gpio5: gpio@4805b000 {

			compatible = "ti,omap4-gpio";

			ti,hwmods = "gpio5";

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <1>;

		};



		gpio6: gpio@4805d000 {

			compatible = "ti,omap4-gpio";

			ti,hwmods = "gpio6";

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <1>;

		};



		gpio7: gpio@48051000 {

			compatible = "ti,omap4-gpio";

			ti,hwmods = "gpio7";

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <1>;

		};



		gpio8: gpio@48053000 {

			compatible = "ti,omap4-gpio";

			ti,hwmods = "gpio8";

			gpio-controller;

			#gpio-cells = <2>;

			interrupt-controller;

			#interrupt-cells = <1>;

		};



		uart1: serial@4806a000 {

			compatible = "ti,omap4-uart";

			ti,hwmods = "uart1";

			clock-frequency = <48000000>;

		};



		uart2: serial@4806c000 {

			compatible = "ti,omap4-uart";

			ti,hwmods = "uart2";

			clock-frequency = <48000000>;

		};



		uart3: serial@48020000 {

			compatible = "ti,omap4-uart";

			ti,hwmods = "uart3";

			clock-frequency = <48000000>;

		};



		uart4: serial@4806e000 {

			compatible = "ti,omap4-uart";

			ti,hwmods = "uart4";

			clock-frequency = <48000000>;

		};



		uart5: serial@48066000 {

			compatible = "ti,omap5-uart";

			ti,hwmods = "uart5";

			clock-frequency = <48000000>;

		};



		uart6: serial@48068000 {

			compatible = "ti,omap6-uart";

			ti,hwmods = "uart6";

			clock-frequency = <48000000>;

		};

	};

};