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Commit 66314223 authored by Dinh Nguyen's avatar Dinh Nguyen Committed by Arnd Bergmann
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ARM: socfpga: initial support for Altera's SOCFPGA platform 



Adding core definitions for Altera's SOCFPGA ARM platform.
Mininum support for Altera's SOCFPGA Cyclone 5 hardware.

Signed-off-by: default avatarDinh Nguyen <dinguyen@altera.com>
Reviewed-by: default avatarPavel Machek <pavel@denx.de>
Reviewed-by: default avatarRob Herring <rob.herring@calxeda.com>
Reviewed-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 31a985f5

MAINTAINERS

+10 −0
Original line number Diff line number Diff line
@@ -1111,6 +1111,16 @@ S: Supported 
F:	arch/arm/mach-shmobile/

F:	drivers/sh/



ARM/SOCFPGA ARCHITECTURE

M:	Dinh Nguyen <dinguyen@altera.com>

S:	Maintained

F:	arch/arm/mach-socfpga/



ARM/SOCFPGA CLOCK FRAMEWORK SUPPORT

M:	Dinh Nguyen <dinguyen@altera.com>

S:	Maintained

F:	drivers/clk/socfpga/



ARM/TECHNOLOGIC SYSTEMS TS7250 MACHINE SUPPORT

M:	Lennert Buytenhek <kernel@wantstofly.org>

L:	linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)

arch/arm/Kconfig

+19 −0
Original line number Diff line number Diff line
@@ -250,6 +250,25 @@ choice 
	prompt "ARM system type"

	default ARCH_VERSATILE



config ARCH_SOCFPGA

	bool "Altera SOCFPGA family"

	select ARCH_WANT_OPTIONAL_GPIOLIB

	select ARM_AMBA

	select ARM_GIC

	select CACHE_L2X0

	select CLKDEV_LOOKUP

	select COMMON_CLK

	select CPU_V7

	select DW_APB_TIMER

	select DW_APB_TIMER_OF

	select GENERIC_CLOCKEVENTS

	select GPIO_PL061 if GPIOLIB

	select HAVE_ARM_SCU

	select SPARSE_IRQ

	select USE_OF

	help

	  This enables support for Altera SOCFPGA Cyclone V platform



config ARCH_INTEGRATOR

	bool "ARM Ltd. Integrator family"

	select ARM_AMBA

arch/arm/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -187,6 +187,7 @@ machine-$(CONFIG_ARCH_VEXPRESS) := vexpress 
machine-$(CONFIG_ARCH_VT8500)		:= vt8500

machine-$(CONFIG_ARCH_W90X900)		:= w90x900

machine-$(CONFIG_FOOTBRIDGE)		:= footbridge

machine-$(CONFIG_ARCH_SOCFPGA)		:= socfpga

machine-$(CONFIG_MACH_SPEAR1310)	:= spear13xx

machine-$(CONFIG_MACH_SPEAR1340)	:= spear13xx

machine-$(CONFIG_MACH_SPEAR300)		:= spear3xx

arch/arm/boot/dts/socfpga.dtsi

0 → 100644
+147 −0
Original line number Diff line number Diff line 
/*

 *  Copyright (C) 2012 Altera <www.altera.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */



/include/ "skeleton.dtsi"



/ {

	#address-cells = <1>;

	#size-cells = <1>;



	aliases {

		ethernet0 = &gmac0;

		serial0 = &uart0;

		serial1 = &uart1;

	};



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

			compatible = "arm,cortex-a9";

			device_type = "cpu";

			reg = <0>;

			next-level-cache = <&L2>;

		};

		cpu@1 {

			compatible = "arm,cortex-a9";

			device_type = "cpu";

			reg = <1>;

			next-level-cache = <&L2>;

		};

	};



	intc: intc@fffed000 {

		compatible = "arm,cortex-a9-gic";

		#interrupt-cells = <3>;

		interrupt-controller;

		reg = <0xfffed000 0x1000>,

		      <0xfffec100 0x100>;

	};



	soc {

		#address-cells = <1>;

		#size-cells = <1>;

		compatible = "simple-bus";

		device_type = "soc";

		interrupt-parent = <&intc>;

		ranges;



		amba {

			compatible = "arm,amba-bus";

			#address-cells = <1>;

			#size-cells = <1>;

			ranges;



			pdma: pdma@ffe01000 {

				compatible = "arm,pl330", "arm,primecell";

				reg = <0xffe01000 0x1000>;

				interrupts = <0 180 4>;

			};

		};



		gmac0: stmmac@ff700000 {

			compatible = "altr,socfpga-stmmac", "snps,dwmac-3.70a", "snps,dwmac";

			reg = <0xff700000 0x2000>;

			interrupts = <0 115 4>;

			interrupt-names = "macirq";

			mac-address = [00 00 00 00 00 00];/* Filled in by U-Boot */

			phy-mode = "gmii";

		};



		L2: l2-cache@fffef000 {

			compatible = "arm,pl310-cache";

			reg = <0xfffef000 0x1000>;

			interrupts = <0 38 0x04>;

			cache-unified;

			cache-level = <2>;

		};



		/* Local timer */

		timer@fffec600 {

			compatible = "arm,cortex-a9-twd-timer";

			reg = <0xfffec600 0x100>;

			interrupts = <1 13 0xf04>;

		};



		timer0: timer@ffc08000 {

			compatible = "snps,dw-apb-timer-sp";

			interrupts = <0 167 4>;

			clock-frequency = <200000000>;

			reg = <0xffc08000 0x1000>;

		};



		timer1: timer@ffc09000 {

			compatible = "snps,dw-apb-timer-sp";

			interrupts = <0 168 4>;

			clock-frequency = <200000000>;

			reg = <0xffc09000 0x1000>;

		};



		timer2: timer@ffd00000 {

			compatible = "snps,dw-apb-timer-osc";

			interrupts = <0 169 4>;

			clock-frequency = <200000000>;

			reg = <0xffd00000 0x1000>;

		};



		timer3: timer@ffd01000 {

			compatible = "snps,dw-apb-timer-osc";

			interrupts = <0 170 4>;

			clock-frequency = <200000000>;

			reg = <0xffd01000 0x1000>;

		};



		uart0: uart@ffc02000 {

			compatible = "snps,dw-apb-uart";

			reg = <0xffc02000 0x1000>;

			clock-frequency = <7372800>;

			interrupts = <0 162 4>;

			reg-shift = <2>;

			reg-io-width = <4>;

		};



		uart1: uart@ffc03000 {

			compatible = "snps,dw-apb-uart";

			reg = <0xffc03000 0x1000>;

			clock-frequency = <7372800>;

			interrupts = <0 163 4>;

			reg-shift = <2>;

			reg-io-width = <4>;

		};

	};

};

arch/arm/boot/dts/socfpga_cyclone5.dts

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+34 −0
Original line number Diff line number Diff line 
/*

 *  Copyright (C) 2012 Altera Corporation <www.altera.com>

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */



/dts-v1/;

/include/ "socfpga.dtsi"



/ {

	model = "Altera SOCFPGA Cyclone V";

	compatible = "altr,socfpga-cyclone5";



	chosen {

		bootargs = "console=ttyS0,57600";

	};



	memory {

		name = "memory";

		device_type = "memory";

		reg = <0x0 0x10000000>; /* 256MB */

	};

};