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Commit 64bf54f7 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'DT-for-v3.14-part-1' of http://git.stlinux.com/devel/kernel/linux-sti into next/dt

From Srinivas Handagatla, DT updates for STi platforms.

* tag 'DT-for-v3.14-part-1' of http://git.stlinux.com/devel/kernel/linux-sti

:
  ARM: STi: Add I2C config to B2000 and B2020 boards
  ARM: STi: Supply I2C configuration to STiH415 SoC
  ARM: STi: Supply I2C configuration to STiH416 SoC
  ARM: STi: OF: Fix a typo in pincfg header

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 25e9cd46 c6fddbd4
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+1 −1
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@
/* Pull Up */
#define PU			(1 << 26)
/* Open Drain */
#define OD			(1 << 26)
#define OD			(1 << 25)
#define RT			(1 << 23)
#define INVERTCLK		(1 << 22)
#define CLKNOTDATA		(1 << 21)
+36 −0
Original line number Diff line number Diff line
@@ -86,6 +86,24 @@
					};
				};
			};

			sbc_i2c0 {
				pinctrl_sbc_i2c0_default: sbc_i2c0-default {
					st,pins {
						sda = <&PIO4 6 ALT1 BIDIR>;
						scl = <&PIO4 5 ALT1 BIDIR>;
					};
				};
			};

			sbc_i2c1 {
				pinctrl_sbc_i2c1_default: sbc_i2c1-default {
					st,pins {
						sda = <&PIO3 2 ALT2 BIDIR>;
						scl = <&PIO3 1 ALT2 BIDIR>;
					};
				};
			};
		};

		pin-controller-front {
@@ -143,6 +161,24 @@
				reg		= <0x7000 0x100>;
				st,bank-name	= "PIO12";
			};

			i2c0 {
				pinctrl_i2c0_default: i2c0-default {
					st,pins {
						sda = <&PIO9 3 ALT1 BIDIR>;
						scl = <&PIO9 2 ALT1 BIDIR>;
					};
				};
			};

			i2c1 {
				pinctrl_i2c1_default: i2c1-default {
					st,pins {
						sda = <&PIO12 1 ALT1 BIDIR>;
						scl = <&PIO12 0 ALT1 BIDIR>;
					};
				};
			};
		};

		pin-controller-rear {
+53 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@
#include "stih41x.dtsi"
#include "stih415-clock.dtsi"
#include "stih415-pinctrl.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {

	L2: cache-controller {
@@ -83,5 +84,57 @@
			pinctrl-names 	= "default";
			pinctrl-0	= <&pinctrl_sbc_serial1>;
		};

		i2c@fed40000 {
			compatible	= "st,comms-ssc4-i2c";
			reg		= <0xfed40000 0x110>;
			interrupts	= <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
			clocks		= <&CLKS_ICN_REG_0>;
			clock-names	= "ssc";
			clock-frequency = <400000>;
			pinctrl-names	= "default";
			pinctrl-0	= <&pinctrl_i2c0_default>;

			status		= "disabled";
		};

		i2c@fed41000 {
			compatible	= "st,comms-ssc4-i2c";
			reg		= <0xfed41000 0x110>;
			interrupts	= <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
			clocks		= <&CLKS_ICN_REG_0>;
			clock-names	= "ssc";
			clock-frequency = <400000>;
			pinctrl-names	= "default";
			pinctrl-0	= <&pinctrl_i2c1_default>;

			status		= "disabled";
		};

		i2c@fe540000 {
			compatible	= "st,comms-ssc4-i2c";
			reg		= <0xfe540000 0x110>;
			interrupts	= <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
			clocks		= <&CLK_SYSIN>;
			clock-names	= "ssc";
			clock-frequency = <400000>;
			pinctrl-names	= "default";
			pinctrl-0	= <&pinctrl_sbc_i2c0_default>;

			status		= "disabled";
		};

		i2c@fe541000 {
			compatible	= "st,comms-ssc4-i2c";
			reg		= <0xfe541000 0x110>;
			interrupts	= <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
			clocks		= <&CLK_SYSIN>;
			clock-names	= "ssc";
			clock-frequency = <400000>;
			pinctrl-names	= "default";
			pinctrl-0	= <&pinctrl_sbc_i2c1_default>;

			status		= "disabled";
		};
	};
};
+35 −0
Original line number Diff line number Diff line
@@ -97,6 +97,24 @@
					};
				};
			};

			sbc_i2c0 {
				pinctrl_sbc_i2c0_default: sbc_i2c0-default {
					st,pins {
						sda = <&PIO4 6 ALT1 BIDIR>;
						scl = <&PIO4 5 ALT1 BIDIR>;
					};
				};
			};

			sbc_i2c1 {
				pinctrl_sbc_i2c1_default: sbc_i2c1-default {
					st,pins {
						sda = <&PIO3 2 ALT2 BIDIR>;
						scl = <&PIO3 1 ALT2 BIDIR>;
					};
				};
			};
		};

		pin-controller-front {
@@ -175,6 +193,23 @@
				};
			};

			i2c0 {
				pinctrl_i2c0_default: i2c0-default {
					st,pins {
						sda = <&PIO9 3 ALT1 BIDIR>;
						scl = <&PIO9 2 ALT1 BIDIR>;
					};
				};
			};

			i2c1 {
				pinctrl_i2c1_default: i2c1-default {
					st,pins {
						sda = <&PIO12 1 ALT1 BIDIR>;
						scl = <&PIO12 0 ALT1 BIDIR>;
					};
				};
			};
		};

		pin-controller-rear {
+53 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@
#include "stih41x.dtsi"
#include "stih416-clock.dtsi"
#include "stih416-pinctrl.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
	L2: cache-controller {
		compatible = "arm,pl310-cache";
@@ -92,5 +93,57 @@
			pinctrl-0 	= <&pinctrl_sbc_serial1>;
			clocks          = <&CLK_SYSIN>;
		};

		i2c@fed40000 {
			compatible	= "st,comms-ssc4-i2c";
			reg		= <0xfed40000 0x110>;
			interrupts	= <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
			clocks		= <&CLK_S_ICN_REG_0>;
			clock-names	= "ssc";
			clock-frequency = <400000>;
			pinctrl-names	= "default";
			pinctrl-0	= <&pinctrl_i2c0_default>;

			status		= "disabled";
		};

		i2c@fed41000 {
			compatible	= "st,comms-ssc4-i2c";
			reg		= <0xfed41000 0x110>;
			interrupts	= <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
			clocks		= <&CLK_S_ICN_REG_0>;
			clock-names	= "ssc";
			clock-frequency = <400000>;
			pinctrl-names	= "default";
			pinctrl-0	= <&pinctrl_i2c1_default>;

			status		= "disabled";
		};

		i2c@fe540000 {
			compatible	= "st,comms-ssc4-i2c";
			reg		= <0xfe540000 0x110>;
			interrupts	= <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
			clocks		= <&CLK_SYSIN>;
			clock-names	= "ssc";
			clock-frequency = <400000>;
			pinctrl-names	= "default";
			pinctrl-0	= <&pinctrl_sbc_i2c0_default>;

			status		= "disabled";
		};

		i2c@fe541000 {
			compatible	= "st,comms-ssc4-i2c";
			reg		= <0xfe541000 0x110>;
			interrupts	= <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
			clocks		= <&CLK_SYSIN>;
			clock-names	= "ssc";
			clock-frequency = <400000>;
			pinctrl-names	= "default";
			pinctrl-0	= <&pinctrl_sbc_i2c1_default>;

			status		= "disabled";
		};
	};
};
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