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Commit 6319ea50 authored by Laurent Pinchart's avatar Laurent Pinchart Committed by Simon Horman
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ARM: shmobile: r8a7790: Don't set plat_sci_port scbrr_algo_id field 



The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.

Signed-off-by: default avatarLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 52613951

arch/arm/mach-shmobile/setup-r8a7790.c

+5 −6
Original line number Original line Diff line number Diff line
@@ -100,11 +100,10 @@ void __init r8a7790_pinmux_init(void) 
	r8a7790_register_i2c(3);

	r8a7790_register_i2c(3);

}

}





#define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq)	\

#define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq)		\

static struct plat_sci_port scif##index##_platform_data = {		\

static struct plat_sci_port scif##index##_platform_data = {		\

	.type		= scif_type,					\

	.type		= scif_type,					\

	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\

	.flags		= UPF_BOOT_AUTOCONF | UPF_IOREMAP,		\

	.scbrr_algo_id	= algo,						\

	.scscr		= _scscr,					\

	.scscr		= _scscr,					\

};									\

};									\

									\

									\
@@ -115,19 +114,19 @@ static struct resource scif##index##_resources[] = { \ 




#define R8A7790_SCIF(index, baseaddr, irq)				\

#define R8A7790_SCIF(index, baseaddr, irq)				\

	__R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE,			\

	__R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE,			\

		       SCBRR_ALGO_2, index, baseaddr, irq)

		       index, baseaddr, irq)





#define R8A7790_SCIFA(index, baseaddr, irq)				\

#define R8A7790_SCIFA(index, baseaddr, irq)				\

	__R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0,	\

	__R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0,	\

		       SCBRR_ALGO_4, index, baseaddr, irq)

		       index, baseaddr, irq)





#define R8A7790_SCIFB(index, baseaddr, irq)				\

#define R8A7790_SCIFB(index, baseaddr, irq)				\

	__R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE,			\

	__R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE,			\

		       SCBRR_ALGO_4, index, baseaddr, irq)

		       index, baseaddr, irq)





#define R8A7790_HSCIF(index, baseaddr, irq)				\

#define R8A7790_HSCIF(index, baseaddr, irq)				\

	__R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE,			\

	__R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE,			\

		       SCBRR_ALGO_6, index, baseaddr, irq)

		       index, baseaddr, irq)





R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */

R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */

R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */

R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */