Commit 5ca918e5 authored Sep 25, 2014 by Robin Murphy Committed by Russell King Sep 25, 2014

ARM: 8165/1: alignment: don't break misaligned NEON load/store



The alignment fixup incorrectly decodes faulting ARM VLDn/VSTn
instructions (where the optional alignment hint is given but incorrect)
as LDR/STR, leading to register corruption. Detect these and correctly
treat them as unhandled, so that userspace gets the fault it expects.

Reported-by: Simon Hosie <simon.hosie@arm.com>
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
Cc: <stable@vger.kernel.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

parent 2c553ac1

arch/arm/mm/alignment.c

+3 −0

Original line number	Diff line number	Diff line
		@@ -41,6 +41,7 @@
		* This code is not portable to processors with late data abort handling.
		*/
		#define CODING_BITS(i) (i & 0x0e000000)
		#define COND_BITS(i) (i & 0xf0000000)

		#define LDST_I_BIT(i) (i & (1 << 26)) /* Immediate constant */
		#define LDST_P_BIT(i) (i & (1 << 24)) /* Preindex */
		@@ -821,6 +822,8 @@ do_alignment(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
		break;

		case 0x04000000: /* ldr or str immediate */
		if (COND_BITS(instr) == 0xf0000000) /* NEON VLDn, VSTn */
		goto bad;
		offset.un = OFFSET_BITS(instr);
		handler = do_alignment_ldrstr;
		break;