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Commit 59fd1323 authored by Radim Krčmář's avatar Radim Krčmář Committed by Paolo Bonzini
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KVM: x86: keep track of LVT0 changes under APICv 



Memory-mapped LVT0 register already contains the new value when APICv
traps so we can't directly detect a change.
Memorize a bit we are interested in to enable legacy NMI watchdog.

Suggested-by: default avatarYoshida Nobuo <yoshida.nb@ncos.nec.co.jp>
Signed-off-by: default avatarRadim Krčmář <rkrcmar@redhat.com>
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent db138562

arch/x86/kvm/lapic.c

+8 −6
Original line number Diff line number Diff line
@@ -1257,17 +1257,18 @@ static void start_apic_timer(struct kvm_lapic *apic) 


static void apic_manage_nmi_watchdog(struct kvm_lapic *apic, u32 lvt0_val)

{

	int nmi_wd_enabled = apic_lvt_nmi_mode(kvm_apic_get_reg(apic, APIC_LVT0));

	bool lvt0_in_nmi_mode = apic_lvt_nmi_mode(lvt0_val);



	if (apic_lvt_nmi_mode(lvt0_val)) {

		if (!nmi_wd_enabled) {

	if (apic->lvt0_in_nmi_mode != lvt0_in_nmi_mode) {

		apic->lvt0_in_nmi_mode = lvt0_in_nmi_mode;

		if (lvt0_in_nmi_mode) {

			apic_debug("Receive NMI setting on APIC_LVT0 "

				   "for cpu %d\n", apic->vcpu->vcpu_id);

			atomic_inc(&apic->vcpu->kvm->arch.vapics_in_nmi_mode);

		}

	} else if (nmi_wd_enabled)

		} else

			atomic_dec(&apic->vcpu->kvm->arch.vapics_in_nmi_mode);

	}

}



static int apic_reg_write(struct kvm_lapic *apic, u32 reg, u32 val)

{
@@ -1597,6 +1598,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu, bool init_event) 
	if (!(vcpu->kvm->arch.disabled_quirks & KVM_QUIRK_LINT0_REENABLED))

		apic_set_reg(apic, APIC_LVT0,

			     SET_APIC_DELIVERY_MODE(0, APIC_MODE_EXTINT));

	apic_manage_nmi_watchdog(apic, kvm_apic_get_reg(apic, APIC_LVT0));



	apic_set_reg(apic, APIC_DFR, 0xffffffffU);

	apic_set_spiv(apic, 0xff);

arch/x86/kvm/lapic.h

+1 −0
Original line number Diff line number Diff line
@@ -26,6 +26,7 @@ struct kvm_lapic { 
	struct kvm_vcpu *vcpu;

	bool sw_enabled;

	bool irr_pending;

	bool lvt0_in_nmi_mode;

	/* Number of bits set in ISR. */

	s16 isr_count;

	/* The highest vector set in ISR; if -1 - invalid, must scan ISR. */