Loading arch/mips/kernel/cpu-probe.c +12 −10 Original line number Original line Diff line number Diff line Loading @@ -652,21 +652,24 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) static void __cpuinit decode_configs(struct cpuinfo_mips *c) static void __cpuinit decode_configs(struct cpuinfo_mips *c) { { int ok; /* MIPS32 or MIPS64 compliant CPU. */ /* MIPS32 or MIPS64 compliant CPU. */ c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER | c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER | MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK; MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK; c->scache.flags = MIPS_CACHE_NOT_PRESENT; c->scache.flags = MIPS_CACHE_NOT_PRESENT; /* Read Config registers. */ ok = decode_config0(c); /* Read Config registers. */ if (!decode_config0(c)) BUG_ON(!ok); /* Arch spec violation! */ return; /* actually worth a panic() */ if (ok) if (!decode_config1(c)) ok = decode_config1(c); return; if (ok) if (!decode_config2(c)) ok = decode_config2(c); return; if (ok) if (!decode_config3(c)) ok = decode_config3(c); return; mips_probe_watch_registers(c); } } #ifdef CONFIG_CPU_MIPSR2 #ifdef CONFIG_CPU_MIPSR2 Loading @@ -678,7 +681,6 @@ static inline void spram_config(void) {} static inline void cpu_probe_mips(struct cpuinfo_mips *c) static inline void cpu_probe_mips(struct cpuinfo_mips *c) { { decode_configs(c); decode_configs(c); mips_probe_watch_registers(c); switch (c->processor_id & 0xff00) { switch (c->processor_id & 0xff00) { case PRID_IMP_4KC: case PRID_IMP_4KC: c->cputype = CPU_4KC; c->cputype = CPU_4KC; Loading Loading
arch/mips/kernel/cpu-probe.c +12 −10 Original line number Original line Diff line number Diff line Loading @@ -652,21 +652,24 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c) static void __cpuinit decode_configs(struct cpuinfo_mips *c) static void __cpuinit decode_configs(struct cpuinfo_mips *c) { { int ok; /* MIPS32 or MIPS64 compliant CPU. */ /* MIPS32 or MIPS64 compliant CPU. */ c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER | c->options = MIPS_CPU_4KEX | MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER | MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK; MIPS_CPU_DIVEC | MIPS_CPU_LLSC | MIPS_CPU_MCHECK; c->scache.flags = MIPS_CACHE_NOT_PRESENT; c->scache.flags = MIPS_CACHE_NOT_PRESENT; /* Read Config registers. */ ok = decode_config0(c); /* Read Config registers. */ if (!decode_config0(c)) BUG_ON(!ok); /* Arch spec violation! */ return; /* actually worth a panic() */ if (ok) if (!decode_config1(c)) ok = decode_config1(c); return; if (ok) if (!decode_config2(c)) ok = decode_config2(c); return; if (ok) if (!decode_config3(c)) ok = decode_config3(c); return; mips_probe_watch_registers(c); } } #ifdef CONFIG_CPU_MIPSR2 #ifdef CONFIG_CPU_MIPSR2 Loading @@ -678,7 +681,6 @@ static inline void spram_config(void) {} static inline void cpu_probe_mips(struct cpuinfo_mips *c) static inline void cpu_probe_mips(struct cpuinfo_mips *c) { { decode_configs(c); decode_configs(c); mips_probe_watch_registers(c); switch (c->processor_id & 0xff00) { switch (c->processor_id & 0xff00) { case PRID_IMP_4KC: case PRID_IMP_4KC: c->cputype = CPU_4KC; c->cputype = CPU_4KC; Loading