Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 53595338 authored by Dave Airlie's avatar Dave Airlie
Browse files

drm/radeon: fix problem with changing active VRAM size. (v2) 

So we used to use lpfn directly to restrict VRAM when we couldn't
access the unmappable area, however this was removed in
93225b0d as it also restricted
the gtt placements. However it was only later noticed that this
broke on some hw.

This removes the active_vram_size, and just explicitly sets it
when it changes, TTM/drm_mm will always use the real_vram_size,
and the active vram size will change the TTM size used for lpfn
setting.

We should re-work the fpfn/lpfn to per-placement at some point
I suspect, but that is too late for this kernel.

Hopefully this addresses:
https://bugs.freedesktop.org/show_bug.cgi?id=35254



v2: fix reported useful VRAM size to userspace to be correct.

Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent c640e8ca

drivers/gpu/drm/radeon/evergreen.c

+1 −2
Original line number Diff line number Diff line
@@ -2194,7 +2194,6 @@ int evergreen_mc_init(struct radeon_device *rdev) 
		rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024 * 1024;

	}

	rdev->mc.visible_vram_size = rdev->mc.aper_size;

	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	r700_vram_gtt_location(rdev, &rdev->mc);

	radeon_update_bandwidth_info(rdev);
@@ -2934,7 +2933,7 @@ static int evergreen_startup(struct radeon_device *rdev) 
	/* XXX: ontario has problems blitting to gart at the moment */

	if (rdev->family == CHIP_PALM) {

		rdev->asic->copy = NULL;

		rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

		radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

	}



	/* allocate wb buffer */

drivers/gpu/drm/radeon/evergreen_blit_kms.c

+2 −2
Original line number Diff line number Diff line
@@ -623,7 +623,7 @@ done: 
		dev_err(rdev->dev, "(%d) pin blit object failed\n", r);

		return r;

	}

	rdev->mc.active_vram_size = rdev->mc.real_vram_size;

	radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

	return 0;

}
@@ -631,7 +631,7 @@ void evergreen_blit_fini(struct radeon_device *rdev) 
{

	int r;



	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

	if (rdev->r600_blit.shader_obj == NULL)

		return;

	/* If we can't reserve the bo, unref should be enough to destroy

drivers/gpu/drm/radeon/r100.c

+2 −3
Original line number Diff line number Diff line
@@ -1024,7 +1024,7 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) 
		return r;

	}

	rdev->cp.ready = true;

	rdev->mc.active_vram_size = rdev->mc.real_vram_size;

	radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

	return 0;

}
@@ -1042,7 +1042,7 @@ void r100_cp_fini(struct radeon_device *rdev) 
void r100_cp_disable(struct radeon_device *rdev)

{

	/* Disable ring */

	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

	rdev->cp.ready = false;

	WREG32(RADEON_CP_CSQ_MODE, 0);

	WREG32(RADEON_CP_CSQ_CNTL, 0);
@@ -2312,7 +2312,6 @@ void r100_vram_init_sizes(struct radeon_device *rdev) 
	/* FIXME we don't use the second aperture yet when we could use it */

	if (rdev->mc.visible_vram_size > rdev->mc.aper_size)

		rdev->mc.visible_vram_size = rdev->mc.aper_size;

	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	config_aper_size = RREG32(RADEON_CONFIG_APER_SIZE);

	if (rdev->flags & RADEON_IS_IGP) {

		uint32_t tom;

drivers/gpu/drm/radeon/r600.c

+1 −2
Original line number Diff line number Diff line
@@ -1255,7 +1255,6 @@ int r600_mc_init(struct radeon_device *rdev) 
	rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE);

	rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE);

	rdev->mc.visible_vram_size = rdev->mc.aper_size;

	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	r600_vram_gtt_location(rdev, &rdev->mc);



	if (rdev->flags & RADEON_IS_IGP) {
@@ -1937,7 +1936,7 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v) 
 */

void r600_cp_stop(struct radeon_device *rdev)

{

	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

	WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));

	WREG32(SCRATCH_UMSK, 0);

}

drivers/gpu/drm/radeon/r600_blit_kms.c

+2 −2
Original line number Diff line number Diff line
@@ -558,7 +558,7 @@ done: 
		dev_err(rdev->dev, "(%d) pin blit object failed\n", r);

		return r;

	}

	rdev->mc.active_vram_size = rdev->mc.real_vram_size;

	radeon_ttm_set_active_vram_size(rdev, rdev->mc.real_vram_size);

	return 0;

}
@@ -566,7 +566,7 @@ void r600_blit_fini(struct radeon_device *rdev) 
{

	int r;



	rdev->mc.active_vram_size = rdev->mc.visible_vram_size;

	radeon_ttm_set_active_vram_size(rdev, rdev->mc.visible_vram_size);

	if (rdev->r600_blit.shader_obj == NULL)

		return;

	/* If we can't reserve the bo, unref should be enough to destroy