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Commit 5279aeb4 authored by Alexander Graf's avatar Alexander Graf Committed by Marcelo Tosatti
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KVM: powerpc: Fix mtsrin in book3s_64 mmu 



We were shifting the Ks/Kp/N bits one bit too far on mtsrin. It took
me some time to figure that out, so I also put in some debugging and a
comment explaining the conversion.

This fixes current OpenBIOS boot on PPC64 KVM.

Signed-off-by: default avatarAlexander Graf <agraf@suse.de>
Signed-off-by: default avatarAvi Kivity <avi@redhat.com>
parent a662b813

arch/powerpc/kvm/book3s_64_mmu.c

+21 −1
Original line number Diff line number Diff line
@@ -390,6 +390,26 @@ static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum, 
{

	u64 rb = 0, rs = 0;



	/*

	 * According to Book3 2.01 mtsrin is implemented as:

	 *

	 * The SLB entry specified by (RB)32:35 is loaded from register

	 * RS, as follows.

	 *

	 * SLBE Bit	Source			SLB Field

	 *

	 * 0:31		0x0000_0000		ESID-0:31

	 * 32:35	(RB)32:35		ESID-32:35

	 * 36		0b1			V

	 * 37:61	0x00_0000|| 0b0		VSID-0:24

	 * 62:88	(RS)37:63		VSID-25:51

	 * 89:91	(RS)33:35		Ks Kp N

	 * 92		(RS)36			L ((RS)36 must be 0b0)

	 * 93		0b0			C

	 */



	dprintk("KVM MMU: mtsrin(0x%x, 0x%lx)\n", srnum, value);



	/* ESID = srnum */

	rb |= (srnum & 0xf) << 28;

	/* Set the valid bit */
@@ -400,7 +420,7 @@ static void kvmppc_mmu_book3s_64_mtsrin(struct kvm_vcpu *vcpu, u32 srnum, 
	/* VSID = VSID */

	rs |= (value & 0xfffffff) << 12;

	/* flags = flags */

	rs |= ((value >> 27) & 0xf) << 9;

	rs |= ((value >> 28) & 0x7) << 9;



	kvmppc_mmu_book3s_64_slbmte(vcpu, rs, rb);

}