Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 4a5f7eff authored by Dong Aisheng's avatar Dong Aisheng Committed by Linus Walleij
Browse files

pinctrl: pinctrl-imx6q: add missed mux function for USBOTG_ID 



The original pin registers table is derived from u-boot mainline,
but somehow it was found missing some mux functions for USBOTG_ID.
We added it at the bottom by following the exist pin function ids,
then it will not break the exist using of pin function id in dts file.

Reported-by: default avatarRichard Zhao <richard.zhao@freescale.com>
Signed-off-by: default avatarDong Aisheng <dong.aisheng@linaro.org>
parent a6e7360b

Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt

+2 −0
Original line number Original line Diff line number Diff line
@@ -1626,3 +1626,5 @@ MX6Q_PAD_SD2_DAT3__PCIE_CTRL_MUX_11 1587 
MX6Q_PAD_SD2_DAT3__GPIO_1_12			1588

MX6Q_PAD_SD2_DAT3__GPIO_1_12			1588

MX6Q_PAD_SD2_DAT3__SJC_DONE			1589

MX6Q_PAD_SD2_DAT3__SJC_DONE			1589

MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3		1590

MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3		1590

MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID		1591

MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID		1592

drivers/pinctrl/pinctrl-imx6q.c

+2 −0
Original line number Original line Diff line number Diff line
@@ -1950,6 +1950,8 @@ static struct imx_pin_reg imx6q_pin_regs[] = { 
	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 5, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__GPIO_1_12 */

	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 5, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__GPIO_1_12 */

	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 6, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__SJC_DONE */

	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 6, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__SJC_DONE */

	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 */

	IMX_PIN_REG(MX6Q_PAD_SD2_DAT3, 0x0744, 0x035C, 7, 0x0000, 0), /* MX6Q_PAD_SD2_DAT3__ANATOP_TESTO_3 */

	IMX_PIN_REG(MX6Q_PAD_ENET_RX_ER, 0x04EC, 0x01D8, 0, 0x0000, 0), /* MX6Q_PAD_ENET_RX_ER__ANATOP_USBOTG_ID */

	IMX_PIN_REG(MX6Q_PAD_GPIO_1, 0x05F4, 0x0224, 3, 0x0000, 0), /* MX6Q_PAD_GPIO_1__ANATOP_USBOTG_ID */

};

};





/* Pad names for the pinmux subsystem */

/* Pad names for the pinmux subsystem */