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Commit 4811f53f authored by Greg Kroah-Hartman's avatar Greg Kroah-Hartman
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Merge tag 'xceiv-for-v3.9' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-next

Felipe writes:
	usb: xceiv: patches for v3.9 merge window

	Two new PHY drivers coming here: one for Samsung,
	one for OMAP. Both architectures are adding USB3
	support to mainline kernel.

	The PHY layer now allows us to have mulitple PHYs
	of the same type, which is necessary for platforms
	which provide more than one USB peripheral port.

	There's also a few cleanups here: removal of __dev*
	annotations, conversion of a cast to to_delayed_work(),
	and mxs-phy learns about ->set_suspend.
parents cba6c850 5088b6f5
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+22 −0
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synopsys DWC3 CORE

DWC3- USB3 CONTROLLER

Required properties:
 - compatible: must be "synopsys,dwc3"
 - reg : Address and length of the register set for the device
 - interrupts: Interrupts used by the dwc3 controller.
 - usb-phy : array of phandle for the PHY device

Optional properties:
 - tx-fifo-resize: determines if the FIFO *has* to be reallocated.

This is usually a subnode to DWC3 glue to which it is connected.

dwc3@4a030000 {
	compatible = "synopsys,dwc3";
	reg = <0x4a030000 0xcfff>;
	interrupts = <0 92 4>
	usb-phy = <&usb2_phy>, <&usb3,phy>;
	tx-fifo-resize;
};
+33 −1
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OMAP GLUE
OMAP GLUE AND OTHER OMAP SPECIFIC COMPONENTS


OMAP MUSB GLUE
OMAP MUSB GLUE
 - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
 - compatible : Should be "ti,omap4-musb" or "ti,omap3-musb"
 - ti,hwmods : must be "usb_otg_hs"
 - ti,hwmods : must be "usb_otg_hs"
 - ti,has-mailbox : to specify that omap uses an external mailbox
   (in control module) to communicate with the musb core during device connect
   and disconnect.
 - multipoint : Should be "1" indicating the musb controller supports
 - multipoint : Should be "1" indicating the musb controller supports
   multipoint. This is a MUSB configuration-specific setting.
   multipoint. This is a MUSB configuration-specific setting.
 - num_eps : Specifies the number of endpoints. This is also a
 - num_eps : Specifies the number of endpoints. This is also a
@@ -16,13 +19,19 @@ OMAP MUSB GLUE
 - power : Should be "50". This signifies the controller can supply upto
 - power : Should be "50". This signifies the controller can supply upto
   100mA when operating in host mode.
   100mA when operating in host mode.


Optional properties:
 - ctrl-module : phandle of the control module this glue uses to write to
   mailbox

SOC specific device node entry
SOC specific device node entry
usb_otg_hs: usb_otg_hs@4a0ab000 {
usb_otg_hs: usb_otg_hs@4a0ab000 {
	compatible = "ti,omap4-musb";
	compatible = "ti,omap4-musb";
	ti,hwmods = "usb_otg_hs";
	ti,hwmods = "usb_otg_hs";
	ti,has-mailbox;
	multipoint = <1>;
	multipoint = <1>;
	num_eps = <16>;
	num_eps = <16>;
	ram_bits = <12>;
	ram_bits = <12>;
	ctrl-module = <&omap_control_usb>;
};
};


Board specific device node entry
Board specific device node entry
@@ -31,3 +40,26 @@ Board specific device node entry
	mode = <3>;
	mode = <3>;
	power = <50>;
	power = <50>;
};
};

OMAP CONTROL USB

Required properties:
 - compatible: Should be "ti,omap-control-usb"
 - reg : Address and length of the register set for the device. It contains
   the address of "control_dev_conf" and "otghs_control" or "phy_power_usb"
   depending upon omap4 or omap5.
 - reg-names: The names of the register addresses corresponding to the registers
   filled in "reg".
 - ti,type: This is used to differentiate whether the control module has
   usb mailbox or usb3 phy power. omap4 has usb mailbox in control module to
   notify events to the musb core and omap5 has usb3 phy power register to
   power on usb3 phy. Should be "1" if it has mailbox and "2" if it has usb3
   phy power.

omap_control_usb: omap-control-usb@4a002300 {
	compatible = "ti,omap-control-usb";
	reg = <0x4a002300 0x4>,
	      <0x4a00233c 0x4>;
	reg-names = "control_dev_conf", "otghs_control";
	ti,type = <1>;
};
+55 −0
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* Samsung's usb phy transceiver

The Samsung's phy transceiver is used for controlling usb phy for
s3c-hsotg as well as ehci-s5p and ohci-exynos usb controllers
across Samsung SOCs.
TODO: Adding the PHY binding with controller(s) according to the under
developement generic PHY driver.

Required properties:

Exynos4210:
- compatible : should be "samsung,exynos4210-usbphy"
- reg : base physical address of the phy registers and length of memory mapped
	region.

Exynos5250:
- compatible : should be "samsung,exynos5250-usbphy"
- reg : base physical address of the phy registers and length of memory mapped
	region.

Optional properties:
- #address-cells: should be '1' when usbphy node has a child node with 'reg'
		  property.
- #size-cells: should be '1' when usbphy node has a child node with 'reg'
	       property.
- ranges: allows valid translation between child's address space and parent's
	  address space.

- The child node 'usbphy-sys' to the node 'usbphy' is for the system controller
  interface for usb-phy. It should provide the following information required by
  usb-phy controller to control phy.
  - reg : base physical address of PHY_CONTROL registers.
	  The size of this register is the total sum of size of all PHY_CONTROL
	  registers that the SoC has. For example, the size will be
	  '0x4' in case we have only one PHY_CONTROL register (e.g.
	  OTHERS register in S3C64XX or USB_PHY_CONTROL register in S5PV210)
	  and, '0x8' in case we have two PHY_CONTROL registers (e.g.
	  USBDEVICE_PHY_CONTROL and USBHOST_PHY_CONTROL registers in exynos4x).
	  and so on.

Example:
 - Exynos4210

	usbphy@125B0000 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "samsung,exynos4210-usbphy";
		reg = <0x125B0000 0x100>;
		ranges;

		usbphy-sys {
			/* USB device and host PHY_CONTROL registers */
			reg = <0x10020704 0x8>;
		};
	};
+30 −5
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@@ -4,14 +4,39 @@ OMAP USB2 PHY


Required properties:
Required properties:
 - compatible: Should be "ti,omap-usb2"
 - compatible: Should be "ti,omap-usb2"
 - reg : Address and length of the register set for the device. Also
 - reg : Address and length of the register set for the device.
add the address of control module dev conf register until a driver for

control module is added
Optional properties:
 - ctrl-module : phandle of the control module used by PHY driver to power on
   the PHY.


This is usually a subnode of ocp2scp to which it is connected.
This is usually a subnode of ocp2scp to which it is connected.


usb2phy@4a0ad080 {
usb2phy@4a0ad080 {
	compatible = "ti,omap-usb2";
	compatible = "ti,omap-usb2";
	reg = <0x4a0ad080 0x58>,
	reg = <0x4a0ad080 0x58>;
	      <0x4a002300 0x4>;
	ctrl-module = <&omap_control_usb>;
};

OMAP USB3 PHY

Required properties:
 - compatible: Should be "ti,omap-usb3"
 - reg : Address and length of the register set for the device.
 - reg-names: The names of the register addresses corresponding to the registers
   filled in "reg".

Optional properties:
 - ctrl-module : phandle of the control module used by PHY driver to power on
   the PHY.

This is usually a subnode of ocp2scp to which it is connected.

usb3phy@4a084400 {
	compatible = "ti,omap-usb3";
	reg = <0x4a084400 0x80>,
	      <0x4a084800 0x64>,
	      <0x4a084c00 0x40>;
	reg-names = "phy_rx", "phy_tx", "pll_ctrl";
	ctrl-module = <&omap_control_usb>;
};
};
+20 −4
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@@ -420,13 +420,19 @@ static int dwc3_probe(struct platform_device *pdev)
		return -ENOMEM;
		return -ENOMEM;
	}
	}


	if (node) {
		dwc->usb2_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 0);
		dwc->usb3_phy = devm_usb_get_phy_by_phandle(dev, "usb-phy", 1);
	} else {
		dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
		dwc->usb2_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB2);
		dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3);
	}

	if (IS_ERR_OR_NULL(dwc->usb2_phy)) {
	if (IS_ERR_OR_NULL(dwc->usb2_phy)) {
		dev_err(dev, "no usb2 phy configured\n");
		dev_err(dev, "no usb2 phy configured\n");
		return -EPROBE_DEFER;
		return -EPROBE_DEFER;
	}
	}


	dwc->usb3_phy = devm_usb_get_phy(dev, USB_PHY_TYPE_USB3);
	if (IS_ERR_OR_NULL(dwc->usb3_phy)) {
	if (IS_ERR_OR_NULL(dwc->usb3_phy)) {
		dev_err(dev, "no usb3 phy configured\n");
		dev_err(dev, "no usb3 phy configured\n");
		return -EPROBE_DEFER;
		return -EPROBE_DEFER;
@@ -453,8 +459,7 @@ static int dwc3_probe(struct platform_device *pdev)
	else
	else
		dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;
		dwc->maximum_speed = DWC3_DCFG_SUPERSPEED;


	if (of_get_property(node, "tx-fifo-resize", NULL))
	dwc->needs_fifo_resize = of_property_read_bool(node, "tx-fifo-resize");
		dwc->needs_fifo_resize = true;


	pm_runtime_enable(dev);
	pm_runtime_enable(dev);
	pm_runtime_get_sync(dev);
	pm_runtime_get_sync(dev);
@@ -583,11 +588,22 @@ static int dwc3_remove(struct platform_device *pdev)
	return 0;
	return 0;
}
}


#ifdef CONFIG_OF
static const struct of_device_id of_dwc3_match[] = {
	{
		.compatible = "synopsys,dwc3"
	},
	{ },
};
MODULE_DEVICE_TABLE(of, of_dwc3_match);
#endif

static struct platform_driver dwc3_driver = {
static struct platform_driver dwc3_driver = {
	.probe		= dwc3_probe,
	.probe		= dwc3_probe,
	.remove		= dwc3_remove,
	.remove		= dwc3_remove,
	.driver		= {
	.driver		= {
		.name	= "dwc3",
		.name	= "dwc3",
		.of_match_table	= of_match_ptr(of_dwc3_match),
	},
	},
};
};


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