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Commit 411fdc1a authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/pub/scm/linux/kernel/git/jejb/voyager-2.6

* master.kernel.org:/pub/scm/linux/kernel/git/jejb/voyager-2.6:
  [VOYAGER] fix up ptregs removal mess
  [VOYAGER] fix up attribute packed specifiers in voyager.h
  [VOYAGER] fix genirq mess
parents 7f14daa1 81c06b10
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+3 −3
Original line number Diff line number Diff line
@@ -44,7 +44,7 @@ struct voyager_SUS *voyager_SUS = NULL;

#ifdef CONFIG_SMP
static void
voyager_dump(int dummy1, struct pt_regs *dummy2, struct tty_struct *dummy3)
voyager_dump(int dummy1, struct tty_struct *dummy3)
{
	/* get here via a sysrq */
	voyager_smp_dump();
@@ -166,7 +166,7 @@ voyager_memory_detect(int region, __u32 *start, __u32 *length)
 * off the timer tick to the SMP code, since the VIC doesn't have an
 * internal timer (The QIC does, but that's another story). */
void
voyager_timer_interrupt(struct pt_regs *regs)
voyager_timer_interrupt(void)
{
	if((jiffies & 0x3ff) == 0) {

@@ -202,7 +202,7 @@ voyager_timer_interrupt(struct pt_regs *regs)
		}
	}
#ifdef CONFIG_SMP
	smp_vic_timer_interrupt(regs);
	smp_vic_timer_interrupt();
#endif
}

+29 −23
Original line number Diff line number Diff line
@@ -85,8 +85,8 @@ static int ack_QIC_CPI(__u8 cpi);
static void ack_special_QIC_CPI(__u8 cpi);
static void ack_VIC_CPI(__u8 cpi);
static void send_CPI_allbutself(__u8 cpi);
static void enable_vic_irq(unsigned int irq);
static void disable_vic_irq(unsigned int irq);
static void mask_vic_irq(unsigned int irq);
static void unmask_vic_irq(unsigned int irq);
static unsigned int startup_vic_irq(unsigned int irq);
static void enable_local_vic_irq(unsigned int irq);
static void disable_local_vic_irq(unsigned int irq);
@@ -205,14 +205,11 @@ ack_CPI(__u8 cpi)
/* The VIC IRQ descriptors -- these look almost identical to the
 * 8259 IRQs except that masks and things must be kept per processor
 */
static struct hw_interrupt_type vic_irq_type = {
	.typename = "VIC-level",
static struct irq_chip vic_chip = {
	.name		= "VIC",
	.startup	= startup_vic_irq,
	.shutdown = disable_vic_irq,
	.enable = enable_vic_irq,
	.disable = disable_vic_irq,
	.ack = before_handle_vic_irq,
	.end = after_handle_vic_irq,
	.mask		= mask_vic_irq,
	.unmask		= unmask_vic_irq,
	.set_affinity	= set_vic_irq_affinity,
};

@@ -1144,9 +1141,9 @@ smp_apic_timer_interrupt(struct pt_regs *regs)
fastcall void
smp_qic_timer_interrupt(struct pt_regs *regs)
{
	ack_QIC_CPI(QIC_TIMER_CPI);
	struct pt_regs *old_regs = set_irq_regs(regs);
	wrapper_smp_local_timer_interrupt(void);
	ack_QIC_CPI(QIC_TIMER_CPI);
	wrapper_smp_local_timer_interrupt();
	set_irq_regs(old_regs);
}

@@ -1270,12 +1267,10 @@ smp_send_stop(void)
/* this function is triggered in time.c when a clock tick fires
 * we need to re-broadcast the tick to all CPUs */
void
smp_vic_timer_interrupt(struct pt_regs *regs)
smp_vic_timer_interrupt(void)
{
	struct pt_regs *old_regs = set_irq_regs(regs);
	send_CPI_allbutself(VIC_TIMER_CPI);
	smp_local_timer_interrupt();
	set_irq_regs(old_regs);
}

/* local (per CPU) timer interrupt.  It does both profiling and
@@ -1310,7 +1305,7 @@ smp_local_timer_interrupt(void)
						per_cpu(prof_counter, cpu);
		}

		update_process_times(user_mode_vm(irq_regs));
		update_process_times(user_mode_vm(get_irq_regs()));
	}

	if( ((1<<cpu) & voyager_extended_vic_processors) == 0)
@@ -1397,6 +1392,17 @@ setup_profiling_timer(unsigned int multiplier)
	return 0;
}

/* This is a bit of a mess, but forced on us by the genirq changes
 * there's no genirq handler that really does what voyager wants
 * so hack it up with the simple IRQ handler */
static void fastcall
handle_vic_irq(unsigned int irq, struct irq_desc *desc)
{
	before_handle_vic_irq(irq);
	handle_simple_irq(irq, desc);
	after_handle_vic_irq(irq);
}


/*  The CPIs are handled in the per cpu 8259s, so they must be
 *  enabled to be received: FIX: enabling the CPIs in the early
@@ -1433,7 +1439,7 @@ smp_intr_init(void)
	 * This is for later: first 16 correspond to PC IRQs; next 16
	 * are Primary MC IRQs and final 16 are Secondary MC IRQs */
	for(i = 0; i < 48; i++)
		irq_desc[i].chip = &vic_irq_type;
		set_irq_chip_and_handler(i, &vic_chip, handle_vic_irq);
}

/* send a CPI at level cpi to a set of cpus in cpuset (set 1 bit per
@@ -1531,7 +1537,7 @@ ack_VIC_CPI(__u8 cpi)
static unsigned int
startup_vic_irq(unsigned int irq)
{
	enable_vic_irq(irq);
	unmask_vic_irq(irq);

	return 0;
}
@@ -1558,7 +1564,7 @@ startup_vic_irq(unsigned int irq)
 *    adjust their masks accordingly.  */

static void
enable_vic_irq(unsigned int irq)
unmask_vic_irq(unsigned int irq)
{
	/* linux doesn't to processor-irq affinity, so enable on
	 * all CPUs we know about */
@@ -1567,7 +1573,7 @@ enable_vic_irq(unsigned int irq)
	__u32 processorList = 0;
	unsigned long flags;

	VDEBUG(("VOYAGER: enable_vic_irq(%d) CPU%d affinity 0x%lx\n",
	VDEBUG(("VOYAGER: unmask_vic_irq(%d) CPU%d affinity 0x%lx\n",
		irq, cpu, cpu_irq_affinity[cpu]));
	spin_lock_irqsave(&vic_irq_lock, flags);
	for_each_online_cpu(real_cpu) {
@@ -1591,7 +1597,7 @@ enable_vic_irq(unsigned int irq)
}

static void
disable_vic_irq(unsigned int irq)
mask_vic_irq(unsigned int irq)
{
	/* lazy disable, do nothing */
}
@@ -1819,7 +1825,7 @@ set_vic_irq_affinity(unsigned int irq, cpumask_t mask)
	 * disabled again as it comes in (voyager lazy disable).  If
	 * the affinity map is tightened to disable the interrupt on a
	 * cpu, it will be pushed off when it comes in */
	enable_vic_irq(irq);
	unmask_vic_irq(irq);
}

static void
+1 −1
Original line number Diff line number Diff line
@@ -58,4 +58,4 @@ static const int VIC_CPI_Registers[] =

#define VIC_BOOT_INTERRUPT_MASK		0xfe

extern void smp_vic_timer_interrupt(struct pt_regs *regs);
extern void smp_vic_timer_interrupt(void);
+80 −80
Original line number Diff line number Diff line
@@ -118,33 +118,33 @@ typedef struct voyager_module {
} voyager_module_t;

typedef struct voyager_eeprom_hdr {
	 __u8  module_id[4] __attribute__((packed)); 
	 __u8  version_id __attribute__((packed));
	 __u8  config_id __attribute__((packed)); 
	 __u16 boundry_id __attribute__((packed));	/* boundary scan id */
	 __u16 ee_size __attribute__((packed));		/* size of EEPROM */
	 __u8  assembly[11] __attribute__((packed));	/* assembly # */
	 __u8  assembly_rev __attribute__((packed));	/* assembly rev */
	 __u8  tracer[4] __attribute__((packed));	/* tracer number */
	 __u16 assembly_cksum __attribute__((packed));	/* asm checksum */
	 __u16 power_consump __attribute__((packed));	/* pwr requirements */
	 __u16 num_asics __attribute__((packed));	/* number of asics */
	 __u16 bist_time __attribute__((packed));	/* min. bist time */
	 __u16 err_log_offset __attribute__((packed));	/* error log offset */
	 __u16 scan_path_offset __attribute__((packed));/* scan path offset */
	 __u16 cct_offset __attribute__((packed));
	 __u16 log_length __attribute__((packed));	/* length of err log */
	 __u16 xsum_end __attribute__((packed));	/* offset to end of
	 __u8  module_id[4];
	 __u8  version_id;
	 __u8  config_id;
	 __u16 boundry_id;	/* boundary scan id */
	 __u16 ee_size;		/* size of EEPROM */
	 __u8  assembly[11];	/* assembly # */
	 __u8  assembly_rev;	/* assembly rev */
	 __u8  tracer[4];	/* tracer number */
	 __u16 assembly_cksum;	/* asm checksum */
	 __u16 power_consump;	/* pwr requirements */
	 __u16 num_asics;	/* number of asics */
	 __u16 bist_time;	/* min. bist time */
	 __u16 err_log_offset;	/* error log offset */
	 __u16 scan_path_offset;/* scan path offset */
	 __u16 cct_offset;
	 __u16 log_length;	/* length of err log */
	 __u16 xsum_end;	/* offset to end of
							   checksum */
	 __u8  reserved[4] __attribute__((packed));
	 __u8  sflag __attribute__((packed));		/* starting sentinal */
	 __u8  part_number[13] __attribute__((packed));	/* prom part number */
	 __u8  version[10] __attribute__((packed));	/* version number */
	 __u8  signature[8] __attribute__((packed));
	 __u16 eeprom_chksum __attribute__((packed));
	 __u32  data_stamp_offset __attribute__((packed));
	 __u8  eflag  __attribute__((packed));		 /* ending sentinal */
} voyager_eprom_hdr_t;
	 __u8  reserved[4];
	 __u8  sflag;		/* starting sentinal */
	 __u8  part_number[13];	/* prom part number */
	 __u8  version[10];	/* version number */
	 __u8  signature[8];
	 __u16 eeprom_chksum;
	 __u32  data_stamp_offset;
	 __u8  eflag ;		 /* ending sentinal */
} __attribute__((packed)) voyager_eprom_hdr_t;



@@ -155,30 +155,30 @@ typedef struct voyager_eeprom_hdr {
 * in the module EPROMs.  We really only care about the IDs and
 * offsets */
typedef struct voyager_sp_table {
	__u8 asic_id __attribute__((packed));
	__u8 bypass_flag __attribute__((packed));
	__u16 asic_data_offset __attribute__((packed));
	__u16 config_data_offset __attribute__((packed));
} voyager_sp_table_t;
	__u8 asic_id;
	__u8 bypass_flag;
	__u16 asic_data_offset;
	__u16 config_data_offset;
} __attribute__((packed)) voyager_sp_table_t;

typedef struct voyager_jtag_table {
	__u8 icode[4] __attribute__((packed));
	__u8 runbist[4] __attribute__((packed));
	__u8 intest[4] __attribute__((packed));
	__u8 samp_preld[4] __attribute__((packed));
	__u8 ireg_len __attribute__((packed));
} voyager_jtt_t;
	__u8 icode[4];
	__u8 runbist[4];
	__u8 intest[4];
	__u8 samp_preld[4];
	__u8 ireg_len;
} __attribute__((packed)) voyager_jtt_t;

typedef struct voyager_asic_data_table {
	__u8 jtag_id[4] __attribute__((packed));
	__u16 length_bsr __attribute__((packed));
	__u16 length_bist_reg __attribute__((packed));
	__u32 bist_clk __attribute__((packed));
	__u16 subaddr_bits __attribute__((packed));
	__u16 seed_bits __attribute__((packed));
	__u16 sig_bits __attribute__((packed));
	__u16 jtag_offset __attribute__((packed));
} voyager_at_t;
	__u8 jtag_id[4];
	__u16 length_bsr;
	__u16 length_bist_reg;
	__u32 bist_clk;
	__u16 subaddr_bits;
	__u16 seed_bits;
	__u16 sig_bits;
	__u16 jtag_offset;
} __attribute__((packed)) voyager_at_t;

/* Voyager Interrupt Controller (VIC) registers */

@@ -328,52 +328,52 @@ struct voyager_bios_info {
#define NUMBER_OF_POS_REGS	8

typedef struct {
	__u8	MC_Slot __attribute__((packed));
	__u8	POS_Values[NUMBER_OF_POS_REGS] __attribute__((packed));
} MC_SlotInformation_t;
	__u8	MC_Slot;
	__u8	POS_Values[NUMBER_OF_POS_REGS];
} __attribute__((packed)) MC_SlotInformation_t;

struct QuadDescription {
	__u8  Type __attribute__((packed));	/* for type 0 (DYADIC or MONADIC) all fields
	__u8  Type;	/* for type 0 (DYADIC or MONADIC) all fields
                         * will be zero except for slot */
	__u8 StructureVersion __attribute__((packed));
	__u32 CPI_BaseAddress __attribute__((packed));
	__u32  LARC_BankSize __attribute__((packed));	
	__u32 LocalMemoryStateBits __attribute__((packed));
	__u8  Slot __attribute__((packed)); /* Processor slots 1 - 4 */
}; 
	__u8 StructureVersion;
	__u32 CPI_BaseAddress;
	__u32  LARC_BankSize;
	__u32 LocalMemoryStateBits;
	__u8  Slot; /* Processor slots 1 - 4 */
} __attribute__((packed));

struct ProcBoardInfo { 
	__u8 Type __attribute__((packed));    
	__u8 StructureVersion __attribute__((packed));
	__u8 NumberOfBoards __attribute__((packed));
	struct QuadDescription QuadData[MAX_PROCESSOR_BOARDS] __attribute__((packed));
};
	__u8 Type;
	__u8 StructureVersion;
	__u8 NumberOfBoards;
	struct QuadDescription QuadData[MAX_PROCESSOR_BOARDS];
} __attribute__((packed));

struct CacheDescription {
	__u8 Level __attribute__((packed));
	__u32 TotalSize __attribute__((packed));
	__u16 LineSize __attribute__((packed));
	__u8  Associativity __attribute__((packed));
	__u8  CacheType __attribute__((packed));
	__u8  WriteType __attribute__((packed));
	__u8  Number_CPUs_SharedBy __attribute__((packed));
	__u8  Shared_CPUs_Hardware_IDs[MAX_SHARED_CPUS] __attribute__((packed));
	__u8 Level;
	__u32 TotalSize;
	__u16 LineSize;
	__u8  Associativity;
	__u8  CacheType;
	__u8  WriteType;
	__u8  Number_CPUs_SharedBy;
	__u8  Shared_CPUs_Hardware_IDs[MAX_SHARED_CPUS];

};
} __attribute__((packed));

struct CPU_Description {
	__u8 CPU_HardwareId __attribute__((packed));
	char *FRU_String __attribute__((packed));
	__u8 NumberOfCacheLevels __attribute__((packed));
	struct CacheDescription CacheLevelData[MAX_CACHE_LEVELS] __attribute__((packed));
};
	__u8 CPU_HardwareId;
	char *FRU_String;
	__u8 NumberOfCacheLevels;
	struct CacheDescription CacheLevelData[MAX_CACHE_LEVELS];
} __attribute__((packed));

struct CPU_Info {
	__u8 Type __attribute__((packed));
	__u8 StructureVersion __attribute__((packed));
	__u8 NumberOf_CPUs __attribute__((packed));
	struct CPU_Description CPU_Data[MAX_CPUS] __attribute__((packed));
};
	__u8 Type;
	__u8 StructureVersion;
	__u8 NumberOf_CPUs;
	struct CPU_Description CPU_Data[MAX_CPUS];
} __attribute__((packed));


/*