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Commit 400e4b20 authored by Ingo Molnar's avatar Ingo Molnar
Browse files

x86/fpu: Rename xsave.header::xstate_bv to 'xfeatures' 



'xsave.header::xstate_bv' is a misnomer - what does 'bv' stand for?

It probably comes from the 'XGETBV' instruction name, but I could
not find in the Intel documentation where that abbreviation comes
from. It could mean 'bit vector' - or something else?

But how about - instead of guessing about a weird name - we named
the field in an obvious and descriptive way that tells us exactly
what it does?

So rename it to 'xfeatures', which is a bitmask of the
xfeatures that are fpstate_active in that context structure.

Eyesore like:

           fpu->state->xsave.xsave_hdr.xstate_bv |= XSTATE_FP;

is now much more readable:

           fpu->state->xsave.header.xfeatures |= XSTATE_FP;

Which form is not just infinitely more readable, but is also
shorter as well.

Reviewed-by: default avatarBorislav Petkov <bp@alien8.de>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Dave Hansen <dave.hansen@linux.intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 3a54450b

arch/x86/include/asm/fpu/internal.h

+1 −1
Original line number Diff line number Diff line
@@ -261,7 +261,7 @@ static inline int fpu_save_init(struct fpu *fpu) 
		/*

		 * xsave header may indicate the init state of the FP.

		 */

		if (!(fpu->state->xsave.header.xstate_bv & XSTATE_FP))

		if (!(fpu->state->xsave.header.xfeatures & XSTATE_FP))

			return 1;

	} else if (use_fxsr()) {

		fpu_fxsave(fpu);

arch/x86/include/asm/fpu/types.h

+1 −1
Original line number Diff line number Diff line
@@ -100,7 +100,7 @@ struct bndcsr { 
} __packed;



struct xstate_header {

	u64				xstate_bv;

	u64				xfeatures;

	u64				xcomp_bv;

	u64				reserved[6];

} __attribute__((packed));

arch/x86/include/asm/user.h

+4 −4
Original line number Diff line number Diff line
@@ -15,7 +15,7 @@ struct user_ymmh_regs { 
};



struct user_xstate_header {

	__u64 xstate_bv;

	__u64 xfeatures;

	__u64 reserved1[2];

	__u64 reserved2[5];

};
@@ -41,11 +41,11 @@ struct user_xstate_header { 
 * particular process/thread.

 *

 * Also when the user modifies certain state FP/SSE/etc through the

 * ptrace interface, they must ensure that the header.xstate_bv

 * ptrace interface, they must ensure that the header.xfeatures

 * bytes[512..519] of the memory layout are updated correspondingly.

 * i.e., for example when FP state is modified to a non-init state,

 * header.xstate_bv's bit 0 must be set to '1', when SSE is modified to

 * non-init state, header.xstate_bv's bit 1 must to be set to '1', etc.

 * header.xfeatures's bit 0 must be set to '1', when SSE is modified to

 * non-init state, header.xfeatures's bit 1 must to be set to '1', etc.

 */

#define USER_XSTATE_FX_SW_WORDS 6

#define USER_XSTATE_XCR0_WORD	0

arch/x86/include/uapi/asm/sigcontext.h

+2 −2
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ struct _fpx_sw_bytes { 
	__u32 extended_size;	/* total size of the layout referred by

				 * fpstate pointer in the sigcontext.

				 */

	__u64 xstate_bv;

	__u64 xfeatures;

				/* feature bit mask (including fp/sse/extended

				 * state) that is present in the memory

				 * layout.
@@ -210,7 +210,7 @@ struct sigcontext { 
#endif /* !__i386__ */



struct _header {

	__u64 xstate_bv;

	__u64 xfeatures;

	__u64 reserved1[2];

	__u64 reserved2[5];

};

arch/x86/kernel/fpu/core.c

+3 −3
Original line number Diff line number Diff line
@@ -470,7 +470,7 @@ int xfpregs_set(struct task_struct *target, const struct user_regset *regset, 
	 * presence of FP and SSE state.

	 */

	if (cpu_has_xsave)

		fpu->state->xsave.header.xstate_bv |= XSTATE_FPSSE;

		fpu->state->xsave.header.xfeatures |= XSTATE_FPSSE;



	return ret;

}
@@ -528,7 +528,7 @@ int xstateregs_set(struct task_struct *target, const struct user_regset *regset, 
	 * mxcsr reserved bits must be masked to zero for security reasons.

	 */

	xsave->i387.mxcsr &= mxcsr_feature_mask;

	xsave->header.xstate_bv &= xfeatures_mask;

	xsave->header.xfeatures &= xfeatures_mask;

	/*

	 * These bits must be zero.

	 */
@@ -740,7 +740,7 @@ int fpregs_set(struct task_struct *target, const struct user_regset *regset, 
	 * presence of FP.

	 */

	if (cpu_has_xsave)

		fpu->state->xsave.header.xstate_bv |= XSTATE_FP;

		fpu->state->xsave.header.xfeatures |= XSTATE_FP;

	return ret;

}