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Commit 3aefbe07 authored by Andi Kleen's avatar Andi Kleen Committed by Andi Kleen
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[PATCH] i386: Implement X86_FEATURE_SYNC_RDTSC on i386



Syncs up with x86-64.

Signed-off-by: default avatarAndi Kleen <ak@suse.de>
parent e859dc55
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+3 −1
Original line number Diff line number Diff line
@@ -188,8 +188,10 @@ static void __cpuinit init_intel(struct cpuinfo_x86 *c)
	}
#endif

	if (c->x86 == 15)
	if (c->x86 == 15) {
		set_bit(X86_FEATURE_P4, c->x86_capability);
		set_bit(X86_FEATURE_SYNC_RDTSC, c->x86_capability);
	}
	if (c->x86 == 6) 
		set_bit(X86_FEATURE_P3, c->x86_capability);
	if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
+1 −0
Original line number Diff line number Diff line
@@ -79,6 +79,7 @@
#define X86_FEATURE_PEBS	(3*32+12)  /* Precise-Event Based Sampling */
#define X86_FEATURE_BTS		(3*32+13)  /* Branch Trace Store */
#define X86_FEATURE_LAPIC_TIMER_BROKEN (3*32+ 14) /* lapic timer broken in C1 */
#define X86_FEATURE_SYNC_RDTSC	(3*32+15)  /* RDTSC synchronizes the CPU */

/* Intel-defined CPU features, CPUID level 0x00000001 (ecx), word 4 */
#define X86_FEATURE_XMM3	(4*32+ 0) /* Streaming SIMD Extensions-3 */
+0 −4
Original line number Diff line number Diff line
@@ -35,7 +35,6 @@ static inline cycles_t get_cycles(void)
static __always_inline cycles_t get_cycles_sync(void)
{
	unsigned long long ret;
#ifdef X86_FEATURE_SYNC_RDTSC
	unsigned eax;

	/*
@@ -44,9 +43,6 @@ static __always_inline cycles_t get_cycles_sync(void)
	 */
	alternative_io("cpuid", ASM_NOP2, X86_FEATURE_SYNC_RDTSC,
			  "=a" (eax), "0" (1) : "ebx","ecx","edx","memory");
#else
	sync_core();
#endif
	rdtscll(ret);

	return ret;