powerpc/booke: Restrict SPE exception handlers to e200/e500 cores (3477e71d) · Commits · e / devices / android_kernel_samsung_universal8895

arch/powerpc/kernel/cpu_setup_fsl_booke.S

+11 −1

Original line number	Original line	Diff line number	Diff line
	@@ -91,6 +91,7 @@ _GLOBAL(setup_altivec_idle)

	blr		blr

			#ifdef CONFIG_PPC_E500MC
	_GLOBAL(__setup_cpu_e6500)		_GLOBAL(__setup_cpu_e6500)
	mflr r6		mflr r6
	#ifdef CONFIG_PPC64		#ifdef CONFIG_PPC64
	@@ -107,14 +108,20 @@ _GLOBAL(__setup_cpu_e6500)
	bl __setup_cpu_e5500		bl __setup_cpu_e5500
	mtlr r6		mtlr r6
	blr		blr
			#endif /* CONFIG_PPC_E500MC */

	#ifdef CONFIG_PPC32		#ifdef CONFIG_PPC32
			#ifdef CONFIG_E200
	_GLOBAL(__setup_cpu_e200)		_GLOBAL(__setup_cpu_e200)
	/* enable dedicated debug exception handling resources (Debug APU) */		/* enable dedicated debug exception handling resources (Debug APU) */
	mfspr r3,SPRN_HID0		mfspr r3,SPRN_HID0
	ori r3,r3,HID0_DAPUEN@l		ori r3,r3,HID0_DAPUEN@l
	mtspr SPRN_HID0,r3		mtspr SPRN_HID0,r3
	b __setup_e200_ivors		b __setup_e200_ivors
			#endif /* CONFIG_E200 */

			#ifdef CONFIG_E500
			#ifndef CONFIG_PPC_E500MC
	_GLOBAL(__setup_cpu_e500v1)		_GLOBAL(__setup_cpu_e500v1)
	_GLOBAL(__setup_cpu_e500v2)		_GLOBAL(__setup_cpu_e500v2)
	mflr r4		mflr r4
	@@ -129,6 +136,7 @@ _GLOBAL(__setup_cpu_e500v2)
	#endif		#endif
	mtlr r4		mtlr r4
	blr		blr
			#else /* CONFIG_PPC_E500MC */
	_GLOBAL(__setup_cpu_e500mc)		_GLOBAL(__setup_cpu_e500mc)
	_GLOBAL(__setup_cpu_e5500)		_GLOBAL(__setup_cpu_e5500)
	mflr r5		mflr r5
	@@ -159,7 +167,9 @@ _GLOBAL(__setup_cpu_e5500)
	2:		2:
	mtlr r5		mtlr r5
	blr		blr
	#endif		#endif /* CONFIG_PPC_E500MC */
			#endif /* CONFIG_E500 */
			#endif /* CONFIG_PPC32 */

	#ifdef CONFIG_PPC_BOOK3E_64		#ifdef CONFIG_PPC_BOOK3E_64
	_GLOBAL(__restore_cpu_e6500)		_GLOBAL(__restore_cpu_e6500)

arch/powerpc/kernel/cputable.c

+5 −0

Original line number	Original line	Diff line number	Diff line
	@@ -1961,6 +1961,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
	#endif /* CONFIG_PPC32 */		#endif /* CONFIG_PPC32 */
	#ifdef CONFIG_E500		#ifdef CONFIG_E500
	#ifdef CONFIG_PPC32		#ifdef CONFIG_PPC32
			#ifndef CONFIG_PPC_E500MC
	{ /* e500 */		{ /* e500 */
	.pvr_mask = 0xffff0000,		.pvr_mask = 0xffff0000,
	.pvr_value = 0x80200000,		.pvr_value = 0x80200000,
	@@ -2000,6 +2001,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
	.machine_check = machine_check_e500,		.machine_check = machine_check_e500,
	.platform = "ppc8548",		.platform = "ppc8548",
	},		},
			#else
	{ /* e500mc */		{ /* e500mc */
	.pvr_mask = 0xffff0000,		.pvr_mask = 0xffff0000,
	.pvr_value = 0x80230000,		.pvr_value = 0x80230000,
	@@ -2018,7 +2020,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
	.machine_check = machine_check_e500mc,		.machine_check = machine_check_e500mc,
	.platform = "ppce500mc",		.platform = "ppce500mc",
	},		},
			#endif /* CONFIG_PPC_E500MC */
	#endif /* CONFIG_PPC32 */		#endif /* CONFIG_PPC32 */
			#ifdef CONFIG_PPC_E500MC
	{ /* e5500 */		{ /* e5500 */
	.pvr_mask = 0xffff0000,		.pvr_mask = 0xffff0000,
	.pvr_value = 0x80240000,		.pvr_value = 0x80240000,
	@@ -2062,6 +2066,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
	.machine_check = machine_check_e500mc,		.machine_check = machine_check_e500mc,
	.platform = "ppce6500",		.platform = "ppce6500",
	},		},
			#endif /* CONFIG_PPC_E500MC */
	#ifdef CONFIG_PPC32		#ifdef CONFIG_PPC32
	{ /* default match */		{ /* default match */
	.pvr_mask = 0x00000000,		.pvr_mask = 0x00000000,

arch/powerpc/kernel/head_fsl_booke.S

+13 −5

Original line number	Original line	Diff line number	Diff line
	@@ -613,6 +613,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
	mfspr r10, SPRN_SPRG_RSCRATCH0		mfspr r10, SPRN_SPRG_RSCRATCH0
	b InstructionStorage		b InstructionStorage

			/* Define SPE handlers for e200 and e500v2 */
	#ifdef CONFIG_SPE		#ifdef CONFIG_SPE
	/* SPE Unavailable */		/* SPE Unavailable */
	START_EXCEPTION(SPEUnavailable)		START_EXCEPTION(SPEUnavailable)
	@@ -622,10 +623,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
	b fast_exception_return		b fast_exception_return
	1: addi r3,r1,STACK_FRAME_OVERHEAD		1: addi r3,r1,STACK_FRAME_OVERHEAD
	EXC_XFER_EE_LITE(0x2010, KernelSPE)		EXC_XFER_EE_LITE(0x2010, KernelSPE)
	#else		#elif defined(CONFIG_SPE_POSSIBLE)
	EXCEPTION(0x2020, SPE_ALTIVEC_UNAVAIL, SPEUnavailable, \		EXCEPTION(0x2020, SPE_ALTIVEC_UNAVAIL, SPEUnavailable, \
	unknown_exception, EXC_XFER_EE)		unknown_exception, EXC_XFER_EE)
	#endif /* CONFIG_SPE */		#endif /* CONFIG_SPE_POSSIBLE */

	/* SPE Floating Point Data */		/* SPE Floating Point Data */
	#ifdef CONFIG_SPE		#ifdef CONFIG_SPE
	@@ -635,12 +636,13 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
	/* SPE Floating Point Round */		/* SPE Floating Point Round */
	EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \		EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \
	SPEFloatingPointRoundException, EXC_XFER_EE)		SPEFloatingPointRoundException, EXC_XFER_EE)
	#else		#elif defined(CONFIG_SPE_POSSIBLE)
	EXCEPTION(0x2040, SPE_FP_DATA_ALTIVEC_ASSIST, SPEFloatingPointData,		EXCEPTION(0x2040, SPE_FP_DATA_ALTIVEC_ASSIST, SPEFloatingPointData,
	unknown_exception, EXC_XFER_EE)		unknown_exception, EXC_XFER_EE)
	EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \		EXCEPTION(0x2050, SPE_FP_ROUND, SPEFloatingPointRound, \
	unknown_exception, EXC_XFER_EE)		unknown_exception, EXC_XFER_EE)
	#endif /* CONFIG_SPE */		#endif /* CONFIG_SPE_POSSIBLE */


	/* Performance Monitor */		/* Performance Monitor */
	EXCEPTION(0x2060, PERFORMANCE_MONITOR, PerformanceMonitor, \		EXCEPTION(0x2060, PERFORMANCE_MONITOR, PerformanceMonitor, \
	@@ -947,6 +949,7 @@ get_phys_addr:
	* Global functions		* Global functions
	*/		*/

			#ifdef CONFIG_E200
	/* Adjust or setup IVORs for e200 */		/* Adjust or setup IVORs for e200 */
	_GLOBAL(__setup_e200_ivors)		_GLOBAL(__setup_e200_ivors)
	li r3,DebugDebug@l		li r3,DebugDebug@l
	@@ -959,7 +962,10 @@ _GLOBAL(__setup_e200_ivors)
	mtspr SPRN_IVOR34,r3		mtspr SPRN_IVOR34,r3
	sync		sync
	blr		blr
			#endif

			#ifdef CONFIG_E500
			#ifndef CONFIG_PPC_E500MC
	/* Adjust or setup IVORs for e500v1/v2 */		/* Adjust or setup IVORs for e500v1/v2 */
	_GLOBAL(__setup_e500_ivors)		_GLOBAL(__setup_e500_ivors)
	li r3,DebugCrit@l		li r3,DebugCrit@l
	@@ -974,7 +980,7 @@ _GLOBAL(__setup_e500_ivors)
	mtspr SPRN_IVOR35,r3		mtspr SPRN_IVOR35,r3
	sync		sync
	blr		blr
			#else
	/* Adjust or setup IVORs for e500mc */		/* Adjust or setup IVORs for e500mc */
	_GLOBAL(__setup_e500mc_ivors)		_GLOBAL(__setup_e500mc_ivors)
	li r3,DebugDebug@l		li r3,DebugDebug@l
	@@ -1000,6 +1006,8 @@ _GLOBAL(__setup_ehv_ivors)
	mtspr SPRN_IVOR41,r3		mtspr SPRN_IVOR41,r3
	sync		sync
	blr		blr
			#endif /* CONFIG_PPC_E500MC */
			#endif /* CONFIG_E500 */

	#ifdef CONFIG_SPE		#ifdef CONFIG_SPE
	/*		/*

arch/powerpc/platforms/Kconfig.cputype

+5 −1

Original line number	Original line	Diff line number	Diff line
	@@ -303,9 +303,13 @@ config PPC_ICSWX_USE_SIGILL

	If in doubt, say N here.		If in doubt, say N here.

			config SPE_POSSIBLE
			def_bool y
			depends on E200 \|\| (E500 && !PPC_E500MC)

	config SPE		config SPE
	bool "SPE Support"		bool "SPE Support"
	depends on E200 \|\| (E500 && !PPC_E500MC)		depends on SPE_POSSIBLE
	default y		default y
	---help---		---help---
	This option enables kernel support for the Signal Processing		This option enables kernel support for the Signal Processing