Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 321081f5 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge branch 'sunxi/dt' into next/dt



This avoids a boot regression

* sunxi/dt:
  Revert "ARM: dts: sunxi: unify APB1 clock"
  Revert "ARM: dts: sunxi: Use sun4i-a10-apb1-clk for sun6i/sun8i apb2 clocks."

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents d1940cbd da1a7592
Loading
Loading
Loading
Loading
+10 −2
Original line number Diff line number Diff line
@@ -174,11 +174,19 @@
				"apb0_ir1", "apb0_keypad";
		};

		apb1: clk@01c20058 {
		apb1_mux: apb1_mux@01c20058 {
			#clock-cells = <0>;
			compatible = "allwinner,sun4i-a10-apb1-clk";
			compatible = "allwinner,sun4i-a10-apb1-mux-clk";
			reg = <0x01c20058 0x4>;
			clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
			clock-output-names = "apb1_mux";
		};

		apb1: apb1@01c20058 {
			#clock-cells = <0>;
			compatible = "allwinner,sun4i-a10-apb1-clk";
			reg = <0x01c20058 0x4>;
			clocks = <&apb1_mux>;
			clock-output-names = "apb1";
		};

+10 −2
Original line number Diff line number Diff line
@@ -162,11 +162,19 @@
				"apb0_ir", "apb0_keypad";
		};

		apb1: clk@01c20058 {
		apb1_mux: apb1_mux@01c20058 {
			#clock-cells = <0>;
			compatible = "allwinner,sun4i-a10-apb1-clk";
			compatible = "allwinner,sun4i-a10-apb1-mux-clk";
			reg = <0x01c20058 0x4>;
			clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
			clock-output-names = "apb1_mux";
		};

		apb1: apb1@01c20058 {
			#clock-cells = <0>;
			compatible = "allwinner,sun4i-a10-apb1-clk";
			reg = <0x01c20058 0x4>;
			clocks = <&apb1_mux>;
			clock-output-names = "apb1";
		};

+10 −2
Original line number Diff line number Diff line
@@ -161,11 +161,19 @@
			clock-output-names = "apb0_codec", "apb0_pio", "apb0_ir";
		};

		apb1: clk@01c20058 {
		apb1_mux: apb1_mux@01c20058 {
			#clock-cells = <0>;
			compatible = "allwinner,sun4i-a10-apb1-clk";
			compatible = "allwinner,sun4i-a10-apb1-mux-clk";
			reg = <0x01c20058 0x4>;
			clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
			clock-output-names = "apb1_mux";
		};

		apb1: apb1@01c20058 {
			#clock-cells = <0>;
			compatible = "allwinner,sun4i-a10-apb1-clk";
			reg = <0x01c20058 0x4>;
			clocks = <&apb1_mux>;
			clock-output-names = "apb1";
		};

+10 −2
Original line number Diff line number Diff line
@@ -217,11 +217,19 @@
					"apb1_daudio1";
		};

		apb2: clk@01c20058 {
		apb2_mux: apb2_mux@01c20058 {
			#clock-cells = <0>;
			compatible = "allwinner,sun4i-a10-apb1-clk";
			compatible = "allwinner,sun4i-a10-apb1-mux-clk";
			reg = <0x01c20058 0x4>;
			clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>;
			clock-output-names = "apb2_mux";
		};

		apb2: apb2@01c20058 {
			#clock-cells = <0>;
			compatible = "allwinner,sun6i-a31-apb2-div-clk";
			reg = <0x01c20058 0x4>;
			clocks = <&apb2_mux>;
			clock-output-names = "apb2";
		};

+10 −2
Original line number Diff line number Diff line
@@ -222,11 +222,19 @@
				"apb0_iis2", "apb0_keypad";
		};

		apb1: clk@01c20058 {
		apb1_mux: apb1_mux@01c20058 {
			#clock-cells = <0>;
			compatible = "allwinner,sun4i-a10-apb1-clk";
			compatible = "allwinner,sun4i-a10-apb1-mux-clk";
			reg = <0x01c20058 0x4>;
			clocks = <&osc24M>, <&pll6 1>, <&osc32k>;
			clock-output-names = "apb1_mux";
		};

		apb1: apb1@01c20058 {
			#clock-cells = <0>;
			compatible = "allwinner,sun4i-a10-apb1-clk";
			reg = <0x01c20058 0x4>;
			clocks = <&apb1_mux>;
			clock-output-names = "apb1";
		};

Loading