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Commit 31d95612 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'zynq-dt-for-3.14' of git://git.xilinx.com/linux-xlnx into next/dt 

From Michal Simek:

arm: Xilinx Zynq dt patches for v3.14

- Add gem support
- Add cpus node
- TTC cleanup

* tag 'zynq-dt-for-3.14' of git://git.xilinx.com/linux-xlnx

:
  arm: dt: zynq: Add 'cpus' node
  arm: dt: zynq: Remove 'clock-ranges' from TTC nodes
  ARM: zynq: add gem support

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 1c928d10 41e4cdb9

arch/arm/boot/dts/zynq-7000.dtsi

+37 −2
Original line number Original line Diff line number Diff line
@@ -15,6 +15,25 @@ 
/ {

/ {

	compatible = "xlnx,zynq-7000";

	compatible = "xlnx,zynq-7000";





	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

			compatible = "arm,cortex-a9";

			device_type = "cpu";

			reg = <0>;

			clocks = <&clkc 3>;

		};



		cpu@1 {

			compatible = "arm,cortex-a9";

			device_type = "cpu";

			reg = <1>;

			clocks = <&clkc 3>;

		};

	};



	pmu {

	pmu {

		compatible = "arm,cortex-a9-pmu";

		compatible = "arm,cortex-a9-pmu";

		interrupts = <0 5 4>, <0 6 4>;

		interrupts = <0 5 4>, <0 6 4>;
@@ -65,6 +84,24 @@ 
			interrupts = <0 50 4>;

			interrupts = <0 50 4>;

		};

		};





		gem0: ethernet@e000b000 {

			compatible = "cdns,gem";

			reg = <0xe000b000 0x4000>;

			status = "disabled";

			interrupts = <0 22 4>;

			clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>;

			clock-names = "pclk", "hclk", "tx_clk";

		};



		gem1: ethernet@e000c000 {

			compatible = "cdns,gem";

			reg = <0xe000c000 0x4000>;

			status = "disabled";

			interrupts = <0 45 4>;

			clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>;

			clock-names = "pclk", "hclk", "tx_clk";

		};



		slcr: slcr@f8000000 {

		slcr: slcr@f8000000 {

			compatible = "xlnx,zynq-slcr";

			compatible = "xlnx,zynq-slcr";

			reg = <0xF8000000 0x1000>;

			reg = <0xF8000000 0x1000>;
@@ -106,7 +143,6 @@ 
			compatible = "cdns,ttc";

			compatible = "cdns,ttc";

			clocks = <&clkc 6>;

			clocks = <&clkc 6>;

			reg = <0xF8001000 0x1000>;

			reg = <0xF8001000 0x1000>;

			clock-ranges;

		};

		};





		ttc1: ttc1@f8002000 {

		ttc1: ttc1@f8002000 {
@@ -115,7 +151,6 @@ 
			compatible = "cdns,ttc";

			compatible = "cdns,ttc";

			clocks = <&clkc 6>;

			clocks = <&clkc 6>;

			reg = <0xF8002000 0x1000>;

			reg = <0xF8002000 0x1000>;

			clock-ranges;

		};

		};

		scutimer: scutimer@f8f00600 {

		scutimer: scutimer@f8f00600 {

			interrupt-parent = <&intc>;

			interrupt-parent = <&intc>;

arch/arm/boot/dts/zynq-zc702.dts

+5 −0
Original line number Original line Diff line number Diff line
@@ -29,6 +29,11 @@ 




};

};





&gem0 {

	status = "okay";

	phy-mode = "rgmii";

};



&uart1 {

&uart1 {

	status = "okay";

	status = "okay";

};
 
};

arch/arm/boot/dts/zynq-zc706.dts

+5 −0
Original line number Original line Diff line number Diff line
@@ -30,6 +30,11 @@ 




};

};





&gem0 {

	status = "okay";

	phy-mode = "rgmii";

};



&uart1 {

&uart1 {

	status = "okay";

	status = "okay";

};
 
};

arch/arm/boot/dts/zynq-zed.dts

+5 −0
Original line number Original line Diff line number Diff line
@@ -30,6 +30,11 @@ 




};

};





&gem0 {

	status = "okay";

	phy-mode = "rgmii";

};



&uart1 {

&uart1 {

	status = "okay";

	status = "okay";

};
 
};