Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 3115624e authored by Adrian Bunk's avatar Adrian Bunk Committed by David S. Miller
Browse files

[SPARC]: "extern inline" doesn't make much sense.

parent ed39f731
Loading
Loading
Loading
Loading
+1 −1
Original line number Original line Diff line number Diff line
@@ -457,7 +457,7 @@ void __init time_init(void)
	sbus_time_init();
	sbus_time_init();
}
}


extern __inline__ unsigned long do_gettimeoffset(void)
static inline unsigned long do_gettimeoffset(void)
{
{
	return (*master_l10_counter >> 10) & 0x1fffff;
	return (*master_l10_counter >> 10) & 0x1fffff;
}
}
+1 −1
Original line number Original line Diff line number Diff line
@@ -260,7 +260,7 @@ static inline pte_t srmmu_pte_modify(pte_t pte, pgprot_t newprot)
{ return __pte((pte_val(pte) & SRMMU_CHG_MASK) | pgprot_val(newprot)); }
{ return __pte((pte_val(pte) & SRMMU_CHG_MASK) | pgprot_val(newprot)); }


/* to find an entry in a top-level page table... */
/* to find an entry in a top-level page table... */
extern inline pgd_t *srmmu_pgd_offset(struct mm_struct * mm, unsigned long address)
static inline pgd_t *srmmu_pgd_offset(struct mm_struct * mm, unsigned long address)
{ return mm->pgd + (address >> SRMMU_PGDIR_SHIFT); }
{ return mm->pgd + (address >> SRMMU_PGDIR_SHIFT); }


/* Find an entry in the second-level page table.. */
/* Find an entry in the second-level page table.. */
+6 −6
Original line number Original line Diff line number Diff line
@@ -51,7 +51,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
#define BTFIXUPDEF_SIMM13(__name)							\
#define BTFIXUPDEF_SIMM13(__name)							\
	extern unsigned int ___sf_##__name(void) __attribute_const__;		\
	extern unsigned int ___sf_##__name(void) __attribute_const__;		\
	extern unsigned ___ss_##__name[2];						\
	extern unsigned ___ss_##__name[2];						\
	extern __inline__ unsigned int ___sf_##__name(void) {				\
	static inline unsigned int ___sf_##__name(void) {				\
		unsigned int ret;							\
		unsigned int ret;							\
		__asm__ ("or %%g0, ___s_" #__name ", %0" : "=r"(ret));			\
		__asm__ ("or %%g0, ___s_" #__name ", %0" : "=r"(ret));			\
		return ret;								\
		return ret;								\
@@ -59,7 +59,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
#define BTFIXUPDEF_SIMM13_INIT(__name,__val)						\
#define BTFIXUPDEF_SIMM13_INIT(__name,__val)						\
	extern unsigned int ___sf_##__name(void) __attribute_const__;		\
	extern unsigned int ___sf_##__name(void) __attribute_const__;		\
	extern unsigned ___ss_##__name[2];						\
	extern unsigned ___ss_##__name[2];						\
	extern __inline__ unsigned int ___sf_##__name(void) {				\
	static inline unsigned int ___sf_##__name(void) {				\
		unsigned int ret;							\
		unsigned int ret;							\
		__asm__ ("or %%g0, ___s_" #__name "__btset_" #__val ", %0" : "=r"(ret));\
		__asm__ ("or %%g0, ___s_" #__name "__btset_" #__val ", %0" : "=r"(ret));\
		return ret;								\
		return ret;								\
@@ -73,7 +73,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
#define BTFIXUPDEF_HALF(__name)								\
#define BTFIXUPDEF_HALF(__name)								\
	extern unsigned int ___af_##__name(void) __attribute_const__;		\
	extern unsigned int ___af_##__name(void) __attribute_const__;		\
	extern unsigned ___as_##__name[2];						\
	extern unsigned ___as_##__name[2];						\
	extern __inline__ unsigned int ___af_##__name(void) {				\
	static inline unsigned int ___af_##__name(void) {				\
		unsigned int ret;							\
		unsigned int ret;							\
		__asm__ ("or %%g0, ___a_" #__name ", %0" : "=r"(ret));			\
		__asm__ ("or %%g0, ___a_" #__name ", %0" : "=r"(ret));			\
		return ret;								\
		return ret;								\
@@ -81,7 +81,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
#define BTFIXUPDEF_HALF_INIT(__name,__val)						\
#define BTFIXUPDEF_HALF_INIT(__name,__val)						\
	extern unsigned int ___af_##__name(void) __attribute_const__;		\
	extern unsigned int ___af_##__name(void) __attribute_const__;		\
	extern unsigned ___as_##__name[2];						\
	extern unsigned ___as_##__name[2];						\
	extern __inline__ unsigned int ___af_##__name(void) {				\
	static inline unsigned int ___af_##__name(void) {				\
		unsigned int ret;							\
		unsigned int ret;							\
		__asm__ ("or %%g0, ___a_" #__name "__btset_" #__val ", %0" : "=r"(ret));\
		__asm__ ("or %%g0, ___a_" #__name "__btset_" #__val ", %0" : "=r"(ret));\
		return ret;								\
		return ret;								\
@@ -92,7 +92,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
#define BTFIXUPDEF_SETHI(__name)							\
#define BTFIXUPDEF_SETHI(__name)							\
	extern unsigned int ___hf_##__name(void) __attribute_const__;		\
	extern unsigned int ___hf_##__name(void) __attribute_const__;		\
	extern unsigned ___hs_##__name[2];						\
	extern unsigned ___hs_##__name[2];						\
	extern __inline__ unsigned int ___hf_##__name(void) {				\
	static inline unsigned int ___hf_##__name(void) {				\
		unsigned int ret;							\
		unsigned int ret;							\
		__asm__ ("sethi %%hi(___h_" #__name "), %0" : "=r"(ret));		\
		__asm__ ("sethi %%hi(___h_" #__name "), %0" : "=r"(ret));		\
		return ret;								\
		return ret;								\
@@ -100,7 +100,7 @@ extern unsigned int ___illegal_use_of_BTFIXUP_INT_in_module(void);
#define BTFIXUPDEF_SETHI_INIT(__name,__val)						\
#define BTFIXUPDEF_SETHI_INIT(__name,__val)						\
	extern unsigned int ___hf_##__name(void) __attribute_const__;		\
	extern unsigned int ___hf_##__name(void) __attribute_const__;		\
	extern unsigned ___hs_##__name[2];						\
	extern unsigned ___hs_##__name[2];						\
	extern __inline__ unsigned int ___hf_##__name(void) {				\
	static inline unsigned int ___hf_##__name(void) {				\
		unsigned int ret;							\
		unsigned int ret;							\
		__asm__ ("sethi %%hi(___h_" #__name "__btset_" #__val "), %0" : 	\
		__asm__ ("sethi %%hi(___h_" #__name "__btset_" #__val "), %0" : 	\
			 "=r"(ret));							\
			 "=r"(ret));							\
+9 −9
Original line number Original line Diff line number Diff line
@@ -27,7 +27,7 @@
 */
 */


/* First, cache-tag access. */
/* First, cache-tag access. */
extern __inline__ unsigned int get_icache_tag(int setnum, int tagnum)
static inline unsigned int get_icache_tag(int setnum, int tagnum)
{
{
	unsigned int vaddr, retval;
	unsigned int vaddr, retval;


@@ -38,7 +38,7 @@ extern __inline__ unsigned int get_icache_tag(int setnum, int tagnum)
	return retval;
	return retval;
}
}


extern __inline__ void put_icache_tag(int setnum, int tagnum, unsigned int entry)
static inline void put_icache_tag(int setnum, int tagnum, unsigned int entry)
{
{
	unsigned int vaddr;
	unsigned int vaddr;


@@ -51,7 +51,7 @@ extern __inline__ void put_icache_tag(int setnum, int tagnum, unsigned int entry
/* Second cache-data access.  The data is returned two-32bit quantities
/* Second cache-data access.  The data is returned two-32bit quantities
 * at a time.
 * at a time.
 */
 */
extern __inline__ void get_icache_data(int setnum, int tagnum, int subblock,
static inline void get_icache_data(int setnum, int tagnum, int subblock,
				       unsigned int *data)
				       unsigned int *data)
{
{
	unsigned int value1, value2, vaddr;
	unsigned int value1, value2, vaddr;
@@ -67,7 +67,7 @@ extern __inline__ void get_icache_data(int setnum, int tagnum, int subblock,
	data[0] = value1; data[1] = value2;
	data[0] = value1; data[1] = value2;
}
}


extern __inline__ void put_icache_data(int setnum, int tagnum, int subblock,
static inline void put_icache_data(int setnum, int tagnum, int subblock,
				       unsigned int *data)
				       unsigned int *data)
{
{
	unsigned int value1, value2, vaddr;
	unsigned int value1, value2, vaddr;
@@ -92,35 +92,35 @@ extern __inline__ void put_icache_data(int setnum, int tagnum, int subblock,
 */
 */


/* Flushes which clear out both the on-chip and external caches */
/* Flushes which clear out both the on-chip and external caches */
extern __inline__ void flush_ei_page(unsigned int addr)
static inline void flush_ei_page(unsigned int addr)
{
{
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
			     "r" (addr), "i" (ASI_M_FLUSH_PAGE) :
			     "r" (addr), "i" (ASI_M_FLUSH_PAGE) :
			     "memory");
			     "memory");
}
}


extern __inline__ void flush_ei_seg(unsigned int addr)
static inline void flush_ei_seg(unsigned int addr)
{
{
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
			     "r" (addr), "i" (ASI_M_FLUSH_SEG) :
			     "r" (addr), "i" (ASI_M_FLUSH_SEG) :
			     "memory");
			     "memory");
}
}


extern __inline__ void flush_ei_region(unsigned int addr)
static inline void flush_ei_region(unsigned int addr)
{
{
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
			     "r" (addr), "i" (ASI_M_FLUSH_REGION) :
			     "r" (addr), "i" (ASI_M_FLUSH_REGION) :
			     "memory");
			     "memory");
}
}


extern __inline__ void flush_ei_ctx(unsigned int addr)
static inline void flush_ei_ctx(unsigned int addr)
{
{
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
			     "r" (addr), "i" (ASI_M_FLUSH_CTX) :
			     "r" (addr), "i" (ASI_M_FLUSH_CTX) :
			     "memory");
			     "memory");
}
}


extern __inline__ void flush_ei_user(unsigned int addr)
static inline void flush_ei_user(unsigned int addr)
{
{
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
			     "r" (addr), "i" (ASI_M_FLUSH_USER) :
			     "r" (addr), "i" (ASI_M_FLUSH_USER) :
+4 −4
Original line number Original line Diff line number Diff line
@@ -48,25 +48,25 @@
#define CYPRESS_NFAULT    0x00000002
#define CYPRESS_NFAULT    0x00000002
#define CYPRESS_MENABLE   0x00000001
#define CYPRESS_MENABLE   0x00000001


extern __inline__ void cypress_flush_page(unsigned long page)
static inline void cypress_flush_page(unsigned long page)
{
{
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
			     "r" (page), "i" (ASI_M_FLUSH_PAGE));
			     "r" (page), "i" (ASI_M_FLUSH_PAGE));
}
}


extern __inline__ void cypress_flush_segment(unsigned long addr)
static inline void cypress_flush_segment(unsigned long addr)
{
{
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
			     "r" (addr), "i" (ASI_M_FLUSH_SEG));
			     "r" (addr), "i" (ASI_M_FLUSH_SEG));
}
}


extern __inline__ void cypress_flush_region(unsigned long addr)
static inline void cypress_flush_region(unsigned long addr)
{
{
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
	__asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
			     "r" (addr), "i" (ASI_M_FLUSH_REGION));
			     "r" (addr), "i" (ASI_M_FLUSH_REGION));
}
}


extern __inline__ void cypress_flush_context(void)
static inline void cypress_flush_context(void)
{
{
	__asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
	__asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
			     "i" (ASI_M_FLUSH_CTX));
			     "i" (ASI_M_FLUSH_CTX));
Loading