Loading Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt 0 → 100644 +52 −0 Original line number Diff line number Diff line * Samsung Exynos Interrupt Combiner Controller Samsung's Exynos4 architecture includes a interrupt combiner controller which can combine interrupt sources as a group and provide a single interrupt request for the group. The interrupt request from each group are connected to a parent interrupt controller, such as GIC in case of Exynos4210. The interrupt combiner controller consists of multiple combiners. Upto eight interrupt sources can be connected to a combiner. The combiner outputs one combined interrupt for its eight interrupt sources. The combined interrupt is usually connected to a parent interrupt controller. A single node in the device tree is used to describe the interrupt combiner controller module (which includes multiple combiners). A combiner in the interrupt controller module shares config/control registers with other combiners. For example, a 32-bit interrupt enable/disable config register can accommodate upto 4 interrupt combiners (with each combiner supporting upto 8 interrupt sources). Required properties: - compatible: should be "samsung,exynos4210-combiner". - interrupt-controller: Identifies the node as an interrupt controller. - #interrupt-cells: should be <2>. The meaning of the cells are * First Cell: Combiner Group Number. * Second Cell: Interrupt number within the group. - reg: Base address and size of interrupt combiner registers. - interrupts: The list of interrupts generated by the combiners which are then connected to a parent interrupt controller. The format of the interrupt specifier depends in the interrupt parent controller. Optional properties: - samsung,combiner-nr: The number of interrupt combiners supported. If this property is not specified, the default number of combiners is assumed to be 16. - interrupt-parent: pHandle of the parent interrupt controller, if not inherited from the parent node. Example: The following is a an example from the Exynos4210 SoC dtsi file. combiner:interrupt-controller@10440000 { compatible = "samsung,exynos4210-combiner"; interrupt-controller; #interrupt-cells = <2>; reg = <0x10440000 0x1000>; interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; }; arch/arm/Kconfig +0 −1 Original line number Diff line number Diff line Loading @@ -1088,7 +1088,6 @@ source "arch/arm/mach-sa1100/Kconfig" source "arch/arm/plat-samsung/Kconfig" source "arch/arm/plat-s3c24xx/Kconfig" source "arch/arm/plat-s5p/Kconfig" source "arch/arm/plat-spear/Kconfig" Loading arch/arm/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -209,7 +209,7 @@ plat-$(CONFIG_PLAT_NOMADIK) := nomadik plat-$(CONFIG_PLAT_ORION) := orion plat-$(CONFIG_PLAT_PXA) := pxa plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung plat-$(CONFIG_PLAT_S5P) := s5p samsung plat-$(CONFIG_PLAT_S5P) := samsung plat-$(CONFIG_PLAT_SPEAR) := spear plat-$(CONFIG_PLAT_VERSATILE) := versatile Loading arch/arm/boot/dts/exynos5250-smdk5250.dts +48 −0 Original line number Diff line number Diff line Loading @@ -23,4 +23,52 @@ chosen { bootargs = "root=/dev/ram0 rw ramdisk=8192 console=ttySAC1,115200"; }; i2c@12C60000 { samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <20000>; gpios = <&gpb3 0 2 3 0>, <&gpb3 1 2 3 0>; eeprom@50 { compatible = "samsung,s524ad0xd1"; reg = <0x50>; }; }; i2c@12C70000 { samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <20000>; gpios = <&gpb3 2 2 3 0>, <&gpb3 3 2 3 0>; eeprom@51 { compatible = "samsung,s524ad0xd1"; reg = <0x51>; }; }; i2c@12C80000 { status = "disabled"; }; i2c@12C90000 { status = "disabled"; }; i2c@12CA0000 { status = "disabled"; }; i2c@12CB0000 { status = "disabled"; }; i2c@12CC0000 { status = "disabled"; }; i2c@12CD0000 { status = "disabled"; }; }; arch/arm/boot/dts/exynos5250.dtsi +29 −31 Original line number Diff line number Diff line Loading @@ -23,11 +23,11 @@ compatible = "samsung,exynos5250"; interrupt-parent = <&gic>; gic:interrupt-controller@10490000 { gic:interrupt-controller@10481000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0x10490000 0x1000>, <0x10480000 0x100>; reg = <0x10481000 0x1000>, <0x10482000 0x2000>; }; watchdog { Loading @@ -42,30 +42,6 @@ interrupts = <0 43 0>, <0 44 0>; }; sdhci@12200000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12200000 0x100>; interrupts = <0 75 0>; }; sdhci@12210000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12210000 0x100>; interrupts = <0 76 0>; }; sdhci@12220000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12220000 0x100>; interrupts = <0 77 0>; }; sdhci@12230000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12230000 0x100>; interrupts = <0 78 0>; }; serial@12C00000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C00000 0x100>; Loading Loading @@ -94,48 +70,64 @@ compatible = "samsung,s3c2440-i2c"; reg = <0x12C60000 0x100>; interrupts = <0 56 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12C70000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C70000 0x100>; interrupts = <0 57 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12C80000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C80000 0x100>; interrupts = <0 58 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12C90000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C90000 0x100>; interrupts = <0 59 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12CA0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CA0000 0x100>; interrupts = <0 60 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12CB0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CB0000 0x100>; interrupts = <0 61 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12CC0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CC0000 0x100>; interrupts = <0 62 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12CD0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CD0000 0x100>; interrupts = <0 63 0>; #address-cells = <1>; #size-cells = <0>; }; amba { Loading @@ -157,13 +149,13 @@ interrupts = <0 35 0>; }; mdma0: pdma@10800000 { mdma0: mdma@10800000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x10800000 0x1000>; interrupts = <0 33 0>; }; mdma1: pdma@11C10000 { mdma1: mdma@11C10000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x11C10000 0x1000>; interrupts = <0 124 0>; Loading Loading @@ -242,6 +234,12 @@ #gpio-cells = <4>; }; gpc4: gpio-controller@114002E0 { compatible = "samsung,exynos4-gpio"; reg = <0x114002E0 0x20>; #gpio-cells = <4>; }; gpd0: gpio-controller@11400160 { compatible = "samsung,exynos4-gpio"; reg = <0x11400160 0x20>; Loading Loading @@ -388,19 +386,19 @@ gpv2: gpio-controller@10D10040 { compatible = "samsung,exynos4-gpio"; reg = <0x10D10040 0x20>; reg = <0x10D10060 0x20>; #gpio-cells = <4>; }; gpv3: gpio-controller@10D10060 { compatible = "samsung,exynos4-gpio"; reg = <0x10D10060 0x20>; reg = <0x10D10080 0x20>; #gpio-cells = <4>; }; gpv4: gpio-controller@10D10080 { compatible = "samsung,exynos4-gpio"; reg = <0x10D10080 0x20>; reg = <0x10D100C0 0x20>; #gpio-cells = <4>; }; Loading Loading
Documentation/devicetree/bindings/arm/samsung/interrupt-combiner.txt 0 → 100644 +52 −0 Original line number Diff line number Diff line * Samsung Exynos Interrupt Combiner Controller Samsung's Exynos4 architecture includes a interrupt combiner controller which can combine interrupt sources as a group and provide a single interrupt request for the group. The interrupt request from each group are connected to a parent interrupt controller, such as GIC in case of Exynos4210. The interrupt combiner controller consists of multiple combiners. Upto eight interrupt sources can be connected to a combiner. The combiner outputs one combined interrupt for its eight interrupt sources. The combined interrupt is usually connected to a parent interrupt controller. A single node in the device tree is used to describe the interrupt combiner controller module (which includes multiple combiners). A combiner in the interrupt controller module shares config/control registers with other combiners. For example, a 32-bit interrupt enable/disable config register can accommodate upto 4 interrupt combiners (with each combiner supporting upto 8 interrupt sources). Required properties: - compatible: should be "samsung,exynos4210-combiner". - interrupt-controller: Identifies the node as an interrupt controller. - #interrupt-cells: should be <2>. The meaning of the cells are * First Cell: Combiner Group Number. * Second Cell: Interrupt number within the group. - reg: Base address and size of interrupt combiner registers. - interrupts: The list of interrupts generated by the combiners which are then connected to a parent interrupt controller. The format of the interrupt specifier depends in the interrupt parent controller. Optional properties: - samsung,combiner-nr: The number of interrupt combiners supported. If this property is not specified, the default number of combiners is assumed to be 16. - interrupt-parent: pHandle of the parent interrupt controller, if not inherited from the parent node. Example: The following is a an example from the Exynos4210 SoC dtsi file. combiner:interrupt-controller@10440000 { compatible = "samsung,exynos4210-combiner"; interrupt-controller; #interrupt-cells = <2>; reg = <0x10440000 0x1000>; interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>, <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>, <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>, <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>; };
arch/arm/Kconfig +0 −1 Original line number Diff line number Diff line Loading @@ -1088,7 +1088,6 @@ source "arch/arm/mach-sa1100/Kconfig" source "arch/arm/plat-samsung/Kconfig" source "arch/arm/plat-s3c24xx/Kconfig" source "arch/arm/plat-s5p/Kconfig" source "arch/arm/plat-spear/Kconfig" Loading
arch/arm/Makefile +1 −1 Original line number Diff line number Diff line Loading @@ -209,7 +209,7 @@ plat-$(CONFIG_PLAT_NOMADIK) := nomadik plat-$(CONFIG_PLAT_ORION) := orion plat-$(CONFIG_PLAT_PXA) := pxa plat-$(CONFIG_PLAT_S3C24XX) := s3c24xx samsung plat-$(CONFIG_PLAT_S5P) := s5p samsung plat-$(CONFIG_PLAT_S5P) := samsung plat-$(CONFIG_PLAT_SPEAR) := spear plat-$(CONFIG_PLAT_VERSATILE) := versatile Loading
arch/arm/boot/dts/exynos5250-smdk5250.dts +48 −0 Original line number Diff line number Diff line Loading @@ -23,4 +23,52 @@ chosen { bootargs = "root=/dev/ram0 rw ramdisk=8192 console=ttySAC1,115200"; }; i2c@12C60000 { samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <20000>; gpios = <&gpb3 0 2 3 0>, <&gpb3 1 2 3 0>; eeprom@50 { compatible = "samsung,s524ad0xd1"; reg = <0x50>; }; }; i2c@12C70000 { samsung,i2c-sda-delay = <100>; samsung,i2c-max-bus-freq = <20000>; gpios = <&gpb3 2 2 3 0>, <&gpb3 3 2 3 0>; eeprom@51 { compatible = "samsung,s524ad0xd1"; reg = <0x51>; }; }; i2c@12C80000 { status = "disabled"; }; i2c@12C90000 { status = "disabled"; }; i2c@12CA0000 { status = "disabled"; }; i2c@12CB0000 { status = "disabled"; }; i2c@12CC0000 { status = "disabled"; }; i2c@12CD0000 { status = "disabled"; }; };
arch/arm/boot/dts/exynos5250.dtsi +29 −31 Original line number Diff line number Diff line Loading @@ -23,11 +23,11 @@ compatible = "samsung,exynos5250"; interrupt-parent = <&gic>; gic:interrupt-controller@10490000 { gic:interrupt-controller@10481000 { compatible = "arm,cortex-a9-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0x10490000 0x1000>, <0x10480000 0x100>; reg = <0x10481000 0x1000>, <0x10482000 0x2000>; }; watchdog { Loading @@ -42,30 +42,6 @@ interrupts = <0 43 0>, <0 44 0>; }; sdhci@12200000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12200000 0x100>; interrupts = <0 75 0>; }; sdhci@12210000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12210000 0x100>; interrupts = <0 76 0>; }; sdhci@12220000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12220000 0x100>; interrupts = <0 77 0>; }; sdhci@12230000 { compatible = "samsung,exynos4210-sdhci"; reg = <0x12230000 0x100>; interrupts = <0 78 0>; }; serial@12C00000 { compatible = "samsung,exynos4210-uart"; reg = <0x12C00000 0x100>; Loading Loading @@ -94,48 +70,64 @@ compatible = "samsung,s3c2440-i2c"; reg = <0x12C60000 0x100>; interrupts = <0 56 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12C70000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C70000 0x100>; interrupts = <0 57 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12C80000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C80000 0x100>; interrupts = <0 58 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12C90000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12C90000 0x100>; interrupts = <0 59 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12CA0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CA0000 0x100>; interrupts = <0 60 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12CB0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CB0000 0x100>; interrupts = <0 61 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12CC0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CC0000 0x100>; interrupts = <0 62 0>; #address-cells = <1>; #size-cells = <0>; }; i2c@12CD0000 { compatible = "samsung,s3c2440-i2c"; reg = <0x12CD0000 0x100>; interrupts = <0 63 0>; #address-cells = <1>; #size-cells = <0>; }; amba { Loading @@ -157,13 +149,13 @@ interrupts = <0 35 0>; }; mdma0: pdma@10800000 { mdma0: mdma@10800000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x10800000 0x1000>; interrupts = <0 33 0>; }; mdma1: pdma@11C10000 { mdma1: mdma@11C10000 { compatible = "arm,pl330", "arm,primecell"; reg = <0x11C10000 0x1000>; interrupts = <0 124 0>; Loading Loading @@ -242,6 +234,12 @@ #gpio-cells = <4>; }; gpc4: gpio-controller@114002E0 { compatible = "samsung,exynos4-gpio"; reg = <0x114002E0 0x20>; #gpio-cells = <4>; }; gpd0: gpio-controller@11400160 { compatible = "samsung,exynos4-gpio"; reg = <0x11400160 0x20>; Loading Loading @@ -388,19 +386,19 @@ gpv2: gpio-controller@10D10040 { compatible = "samsung,exynos4-gpio"; reg = <0x10D10040 0x20>; reg = <0x10D10060 0x20>; #gpio-cells = <4>; }; gpv3: gpio-controller@10D10060 { compatible = "samsung,exynos4-gpio"; reg = <0x10D10060 0x20>; reg = <0x10D10080 0x20>; #gpio-cells = <4>; }; gpv4: gpio-controller@10D10080 { compatible = "samsung,exynos4-gpio"; reg = <0x10D10080 0x20>; reg = <0x10D100C0 0x20>; #gpio-cells = <4>; }; Loading