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Commit 2c05b2c8 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu 

Pull m68knommu arch update from Greg Ungerer:
 "Quite a varied set of changes this time.
   - A little more merge cleanup, this time the assembler entry code.
   - New sub-architecture support for the ColdFire 5251/5253 and 5441x
     CPU families.
   - Specific clk support code for the ColdFire 520x and 532x CPU
     familes.
   - Refactoring of the ColdFire GPIO support.
   - PCI bus support for some ColdFire CPUS that have PCI hardware (54xx
     family).  This showed up a few problems with ColdFire cache,
     allocating coherent memory and bi-directional DMA support.  Fixes
     for those too."

* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (21 commits)
  m68k: allow PCI bus to be enabled for ColdFire m54xx CPUs
  m68k: add PCI bus code support for the ColdFire M54xx SoC family
  m68k: add IO access definitions to support PCI on ColdFire platforms
  m68k: add PCI bus support definitions for the ColdFire M54xx SoC family
  m68k: common PCI support definitions and code
  m68k: add support for DMA_BIDIRECTIONAL in dma support functions
  m68k: fix ColdFire clear cache operation
  m68k: use simpler dma_alloc_coherent() for ColdFire CPUs
  m68knommu: platform support for 8390 based ethernet used on some boards
  m68knommu: Add clk definitions for m532x.
  m68knommu: Add clk definitions for m520x.
  m68knommu: Add rtc device for m5441x.
  m68knommu: add definitions for the third interrupt controller on devices that don't have a third interrupt controller.
  m68knommu: Add support for the Coldfire m5441x.
  m68knommu: use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1
  coldfire-qspi: Add support for the Coldfire 5251/5253.
  m68knommu: Add support for the Coldfire 5251/5253
  m68knommu: refactor Coldfire GPIO not to require GPIOLIB, eliminate mcf_gpio_chips.
  m68k: merge the MMU and non-MMU versions of the entry.S code
  m68k: use jbsr to call functions instead of bsrl
  ...
parents c511dc1f b1f7735e

arch/m68k/Kconfig.bus

+7 −0
Original line number Original line Diff line number Diff line
@@ -48,6 +48,13 @@ config ISA 
config GENERIC_ISA_DMA

config GENERIC_ISA_DMA

	def_bool ISA

	def_bool ISA





config PCI

	bool "PCI support"

	depends on M54xx

	help

	  Enable the PCI bus. Support for the PCI bus hardware built into the

	  ColdFire 547x and 548x processors.



source "drivers/pci/Kconfig"

source "drivers/pci/Kconfig"





source "drivers/zorro/Kconfig"

source "drivers/zorro/Kconfig"

arch/m68k/Kconfig.cpu

+17 −1
Original line number Original line Diff line number Diff line
@@ -23,7 +23,7 @@ config M68KCLASSIC 
config COLDFIRE

config COLDFIRE

	bool "Coldfire CPU family support"

	bool "Coldfire CPU family support"

	select GENERIC_GPIO

	select GENERIC_GPIO

	select ARCH_REQUIRE_GPIOLIB

	select ARCH_WANT_OPTIONAL_GPIOLIB

	select ARCH_HAVE_CUSTOM_GPIO_H

	select ARCH_HAVE_CUSTOM_GPIO_H

	select CPU_HAS_NO_BITFIELDS

	select CPU_HAS_NO_BITFIELDS

	select CPU_HAS_NO_MULDIV64

	select CPU_HAS_NO_MULDIV64
@@ -167,6 +167,14 @@ config M5249 
	help

	help

	  Motorola ColdFire 5249 processor support.

	  Motorola ColdFire 5249 processor support.





config M525x

	bool "MCF525x"

	depends on !MMU

	select COLDFIRE_SW_A7

	select HAVE_MBAR

	help

	  Freescale (Motorola) Coldfire 5251/5253 processor support.



config M527x

config M527x

	bool

	bool
@@ -253,6 +261,14 @@ config M548x 
	help

	help

	  Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.

	  Freescale ColdFire 5480/5481/5482/5483/5484/5485 processor support.





config M5441x

	bool "MCF5441x"

	depends on !MMU

	select GENERIC_CLOCKEVENTS

	select HAVE_CACHE_CB

	help

	  Freescale Coldfire 54410/54415/54416/54417/54418 processor support.



endif # COLDFIRE

endif # COLDFIRE

arch/m68k/Makefile

+2 −0
Original line number Original line Diff line number Diff line
@@ -41,6 +41,7 @@ cpuflags-$(CONFIG_M68030) := 
cpuflags-$(CONFIG_M68020)	:=

cpuflags-$(CONFIG_M68020)	:=

cpuflags-$(CONFIG_M68360)	:= -m68332

cpuflags-$(CONFIG_M68360)	:= -m68332

cpuflags-$(CONFIG_M68000)	:= -m68000

cpuflags-$(CONFIG_M68000)	:= -m68000

cpuflags-$(CONFIG_M5441x)	:= $(call cc-option,-mcpu=54455,-mcfv4e)

cpuflags-$(CONFIG_M54xx)	:= $(call cc-option,-mcpu=5475,-m5200)

cpuflags-$(CONFIG_M54xx)	:= $(call cc-option,-mcpu=5475,-m5200)

cpuflags-$(CONFIG_M5407)	:= $(call cc-option,-mcpu=5407,-m5200)

cpuflags-$(CONFIG_M5407)	:= $(call cc-option,-mcpu=5407,-m5200)

cpuflags-$(CONFIG_M532x)	:= $(call cc-option,-mcpu=532x,-m5307)

cpuflags-$(CONFIG_M532x)	:= $(call cc-option,-mcpu=532x,-m5307)
@@ -50,6 +51,7 @@ cpuflags-$(CONFIG_M5275) := $(call cc-option,-mcpu=5275,-m5307) 
cpuflags-$(CONFIG_M5272)	:= $(call cc-option,-mcpu=5272,-m5307)

cpuflags-$(CONFIG_M5272)	:= $(call cc-option,-mcpu=5272,-m5307)

cpuflags-$(CONFIG_M5271)	:= $(call cc-option,-mcpu=5271,-m5307)

cpuflags-$(CONFIG_M5271)	:= $(call cc-option,-mcpu=5271,-m5307)

cpuflags-$(CONFIG_M523x)	:= $(call cc-option,-mcpu=523x,-m5307)

cpuflags-$(CONFIG_M523x)	:= $(call cc-option,-mcpu=523x,-m5307)

cpuflags-$(CONFIG_M525x)	:= $(call cc-option,-mcpu=5253,-m5200)

cpuflags-$(CONFIG_M5249)	:= $(call cc-option,-mcpu=5249,-m5200)

cpuflags-$(CONFIG_M5249)	:= $(call cc-option,-mcpu=5249,-m5200)

cpuflags-$(CONFIG_M520x)	:= $(call cc-option,-mcpu=5208,-m5200)

cpuflags-$(CONFIG_M520x)	:= $(call cc-option,-mcpu=5208,-m5200)

cpuflags-$(CONFIG_M5206e)	:= $(call cc-option,-mcpu=5206e,-m5200)

cpuflags-$(CONFIG_M5206e)	:= $(call cc-option,-mcpu=5206e,-m5200)

arch/m68k/include/asm/cacheflush_mm.h

+41 −0
Original line number Original line Diff line number Diff line
@@ -16,7 +16,48 @@ 
#define DCACHE_MAX_ADDR	0

#define DCACHE_MAX_ADDR	0

#define DCACHE_SETMASK	0

#define DCACHE_SETMASK	0

#endif

#endif

#ifndef CACHE_MODE

#define	CACHE_MODE	0

#define	CACR_ICINVA	0

#define	CACR_DCINVA	0

#define	CACR_BCINVA	0

#endif





/*

 * ColdFire architecture has no way to clear individual cache lines, so we

 * are stuck invalidating all the cache entries when we want a clear operation.

 */

static inline void clear_cf_icache(unsigned long start, unsigned long end)

{

	__asm__ __volatile__ (

		"movec	%0,%%cacr\n\t"

		"nop"

		:

		: "r" (CACHE_MODE | CACR_ICINVA | CACR_BCINVA));

}



static inline void clear_cf_dcache(unsigned long start, unsigned long end)

{

	__asm__ __volatile__ (

		"movec	%0,%%cacr\n\t"

		"nop"

		:

		: "r" (CACHE_MODE | CACR_DCINVA));

}



static inline void clear_cf_bcache(unsigned long start, unsigned long end)

{

	__asm__ __volatile__ (

		"movec	%0,%%cacr\n\t"

		"nop"

		:

		: "r" (CACHE_MODE | CACR_ICINVA | CACR_BCINVA | CACR_DCINVA));

}



/*

 * Use the ColdFire cpushl instruction to push (and invalidate) cache lines.

 * The start and end addresses are cache line numbers not memory addresses.

 */

static inline void flush_cf_icache(unsigned long start, unsigned long end)

static inline void flush_cf_icache(unsigned long start, unsigned long end)

{

{

	unsigned long set;

	unsigned long set;

arch/m68k/include/asm/dma.h

+7 −1
Original line number Original line Diff line number Diff line
@@ -33,7 +33,9 @@ 
 * Set number of channels of DMA on ColdFire for different implementations.

 * Set number of channels of DMA on ColdFire for different implementations.

 */

 */

#if defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) || \

#if defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407) || \

	defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x)

	defined(CONFIG_M523x) || defined(CONFIG_M527x) || \

	defined(CONFIG_M528x) || defined(CONFIG_M525x)



#define MAX_M68K_DMA_CHANNELS 4

#define MAX_M68K_DMA_CHANNELS 4

#elif defined(CONFIG_M5272)

#elif defined(CONFIG_M5272)

#define MAX_M68K_DMA_CHANNELS 1

#define MAX_M68K_DMA_CHANNELS 1
@@ -486,6 +488,10 @@ static __inline__ int get_dma_residue(unsigned int dmanr) 
extern int request_dma(unsigned int dmanr, const char * device_id);	/* reserve a DMA channel */

extern int request_dma(unsigned int dmanr, const char * device_id);	/* reserve a DMA channel */

extern void free_dma(unsigned int dmanr);	/* release it again */

extern void free_dma(unsigned int dmanr);	/* release it again */





#ifdef CONFIG_PCI

extern int isa_dma_bridge_buggy;

#else

#define isa_dma_bridge_buggy    (0)

#define isa_dma_bridge_buggy    (0)

#endif





#endif /* _M68K_DMA_H */
 
#endif /* _M68K_DMA_H */