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Commit 27e53cfb authored by Andrew Lunn's avatar Andrew Lunn Committed by Mike Turquette
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ARM: Orion: PCIE: Add support for clk



Prepare and enable the clocks when the board indicates the pcie buses
will be used.

Signed-off-by: default avatarAndrew Lunn <andrew@lunn.ch>
Tested-by: default avatarJamie Lentin <jm@lentin.co.uk>
Signed-off-by: default avatarMike Turquette <mturquette@linaro.org>
parent c510182b
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+5 −3
Original line number Diff line number Diff line
@@ -87,7 +87,7 @@ static struct clk __init *kirkwood_register_gate(const char *name, u8 bit_idx)
void __init kirkwood_clk_init(void)
{
	struct clk *runit, *ge0, *ge1, *sata0, *sata1, *usb0, *sdio;
	struct clk *crypto, *xor0, *xor1;
	struct clk *crypto, *xor0, *xor1, *pex0, *pex1;

	tclk = clk_register_fixed_rate(NULL, "tclk", NULL,
				       CLK_IS_ROOT, kirkwood_tclk);
@@ -102,8 +102,8 @@ void __init kirkwood_clk_init(void)
	crypto = kirkwood_register_gate("crypto", CGC_BIT_CRYPTO);
	xor0 = kirkwood_register_gate("xor0",   CGC_BIT_XOR0);
	xor1 = kirkwood_register_gate("xor1",   CGC_BIT_XOR1);
	kirkwood_register_gate("pex0",   CGC_BIT_PEX0);
	kirkwood_register_gate("pex1",   CGC_BIT_PEX1);
	pex0 = kirkwood_register_gate("pex0",   CGC_BIT_PEX0);
	pex1 = kirkwood_register_gate("pex1",   CGC_BIT_PEX1);
	kirkwood_register_gate("audio",  CGC_BIT_AUDIO);
	kirkwood_register_gate("tdm",    CGC_BIT_TDM);
	kirkwood_register_gate("tsu",    CGC_BIT_TSU);
@@ -122,6 +122,8 @@ void __init kirkwood_clk_init(void)
	orion_clkdev_add(NULL, "mv_crypto", crypto);
	orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".0", xor0);
	orion_clkdev_add(NULL, MV_XOR_SHARED_NAME ".1", xor1);
	orion_clkdev_add("0", "pcie", pex0);
	orion_clkdev_add("1", "pcie", pex1);
}

/*****************************************************************************
+20 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@
#include <linux/kernel.h>
#include <linux/pci.h>
#include <linux/slab.h>
#include <linux/clk.h>
#include <video/vga.h>
#include <asm/irq.h>
#include <asm/mach/pci.h>
@@ -19,6 +20,23 @@
#include <plat/addr-map.h>
#include "common.h"

static void kirkwood_enable_pcie_clk(const char *port)
{
	struct clk *clk;

	clk = clk_get_sys("pcie", port);
	if (IS_ERR(clk)) {
		printk(KERN_ERR "PCIE clock %s missing\n", port);
		return;
	}
	clk_prepare_enable(clk);
	clk_put(clk);
}

/* This function is called very early in the boot when probing the
   hardware to determine what we actually are, and what rate tclk is
   ticking at. Hence calling kirkwood_enable_pcie_clk() is not
   possible since the clk tree has not been created yet. */
void kirkwood_enable_pcie(void)
{
	u32 curr = readl(CLOCK_GATING_CTRL);
@@ -183,10 +201,12 @@ static int __init kirkwood_pcie_setup(int nr, struct pci_sys_data *sys)
	switch (index) {
	case 0:
		kirkwood_clk_ctrl |= CGC_PEX0;
		kirkwood_enable_pcie_clk("0");
		pcie0_ioresources_init(pp);
		break;
	case 1:
		kirkwood_clk_ctrl |= CGC_PEX1;
		kirkwood_enable_pcie_clk("1");
		pcie1_ioresources_init(pp);
		break;
	default: