rtlwifi: Move common routines to core (25b13dbc) · Commits · e / devices / android_kernel_samsung_universal8895

drivers/net/wireless/rtlwifi/btcoexist/halbt_precomp.h

+0 −12

Original line number	Diff line number	Diff line
		@@ -72,16 +72,4 @@
		#define BIT30 0x40000000
		#define BIT31 0x80000000

		#define MASKBYTE0 0xff
		#define MASKBYTE1 0xff00
		#define MASKBYTE2 0xff0000
		#define MASKBYTE3 0xff000000
		#define MASKHWORD 0xffff0000
		#define MASKLWORD 0x0000ffff
		#define MASKDWORD 0xffffffff
		#define MASK12BITS 0xfff
		#define MASKH4BITS 0xf0000000
		#define MASKOFDM_D 0xffc00000
		#define MASKCCK 0x3f3f3f3f

		#endif /* __HALBT_PRECOMP_H__ */

drivers/net/wireless/rtlwifi/core.c

+60 −0

Original line number	Diff line number	Diff line
		@@ -36,6 +36,66 @@

		#include <linux/export.h>

		void rtl_addr_delay(u32 addr)
		{
		if (addr == 0xfe)
		mdelay(50);
		else if (addr == 0xfd)
		mdelay(5);
		else if (addr == 0xfc)
		mdelay(1);
		else if (addr == 0xfb)
		udelay(50);
		else if (addr == 0xfa)
		udelay(5);
		else if (addr == 0xf9)
		udelay(1);
		}
		EXPORT_SYMBOL(rtl_addr_delay);

		void rtl_rfreg_delay(struct ieee80211_hw *hw, enum radio_path rfpath, u32 addr,
		u32 mask, u32 data)
		{
		if (addr == 0xfe) {
		mdelay(50);
		} else if (addr == 0xfd) {
		mdelay(5);
		} else if (addr == 0xfc) {
		mdelay(1);
		} else if (addr == 0xfb) {
		udelay(50);
		} else if (addr == 0xfa) {
		udelay(5);
		} else if (addr == 0xf9) {
		udelay(1);
		} else {
		rtl_set_rfreg(hw, rfpath, addr, mask, data);
		udelay(1);
		}
		}
		EXPORT_SYMBOL(rtl_rfreg_delay);

		void rtl_bb_delay(struct ieee80211_hw *hw, u32 addr, u32 data)
		{
		if (addr == 0xfe) {
		mdelay(50);
		} else if (addr == 0xfd) {
		mdelay(5);
		} else if (addr == 0xfc) {
		mdelay(1);
		} else if (addr == 0xfb) {
		udelay(50);
		} else if (addr == 0xfa) {
		udelay(5);
		} else if (addr == 0xf9) {
		udelay(1);
		} else {
		rtl_set_bbreg(hw, addr, MASKDWORD, data);
		udelay(1);
		}
		}
		EXPORT_SYMBOL(rtl_bb_delay);

		void rtl_fw_cb(const struct firmware firmware, void context)
		{
		struct ieee80211_hw *hw = context;

drivers/net/wireless/rtlwifi/core.h

+4 −0

Original line number	Diff line number	Diff line
		@@ -41,5 +41,9 @@

		extern const struct ieee80211_ops rtl_ops;
		void rtl_fw_cb(const struct firmware firmware, void context);
		void rtl_addr_delay(u32 addr);
		void rtl_rfreg_delay(struct ieee80211_hw *hw, enum radio_path rfpath, u32 addr,
		u32 mask, u32 data);
		void rtl_bb_delay(struct ieee80211_hw *hw, u32 addr, u32 data);

		#endif

drivers/net/wireless/rtlwifi/ps.c

+100 −0

Original line number	Diff line number	Diff line
		@@ -32,6 +32,106 @@
		#include "base.h"
		#include "ps.h"

		/* Description:
		* This routine deals with the Power Configuration CMD
		* parsing for RTL8723/RTL8188E Series IC.
		* Assumption:
		* We should follow specific format that was released from HW SD.
		*/
		bool rtl_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
		u8 faversion, u8 interface_type,
		struct wlan_pwr_cfg pwrcfgcmd[])
		{
		struct wlan_pwr_cfg cfg_cmd = {0};
		bool polling_bit = false;
		u32 ary_idx = 0;
		u8 value = 0;
		u32 offset = 0;
		u32 polling_count = 0;
		u32 max_polling_cnt = 5000;

		do {
		cfg_cmd = pwrcfgcmd[ary_idx];
		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
		"rtl_hal_pwrseqcmdparsing(): offset(%#x),cut_msk(%#x), famsk(%#x),"
		"interface_msk(%#x), base(%#x), cmd(%#x), msk(%#x), value(%#x)\n",
		GET_PWR_CFG_OFFSET(cfg_cmd),
		GET_PWR_CFG_CUT_MASK(cfg_cmd),
		GET_PWR_CFG_FAB_MASK(cfg_cmd),
		GET_PWR_CFG_INTF_MASK(cfg_cmd),
		GET_PWR_CFG_BASE(cfg_cmd), GET_PWR_CFG_CMD(cfg_cmd),
		GET_PWR_CFG_MASK(cfg_cmd), GET_PWR_CFG_VALUE(cfg_cmd));

		if ((GET_PWR_CFG_FAB_MASK(cfg_cmd)&faversion) &&
		(GET_PWR_CFG_CUT_MASK(cfg_cmd)&cut_version) &&
		(GET_PWR_CFG_INTF_MASK(cfg_cmd)&interface_type)) {
		switch (GET_PWR_CFG_CMD(cfg_cmd)) {
		case PWR_CMD_READ:
		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
		"rtl_hal_pwrseqcmdparsing(): PWR_CMD_READ\n");
		break;
		case PWR_CMD_WRITE:
		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
		"rtl_hal_pwrseqcmdparsing(): PWR_CMD_WRITE\n");
		offset = GET_PWR_CFG_OFFSET(cfg_cmd);

		/Read the value from system register/
		value = rtl_read_byte(rtlpriv, offset);
		value &= (~(GET_PWR_CFG_MASK(cfg_cmd)));
		value \|= (GET_PWR_CFG_VALUE(cfg_cmd) &
		GET_PWR_CFG_MASK(cfg_cmd));

		/Write the value back to sytem register/
		rtl_write_byte(rtlpriv, offset, value);
		break;
		case PWR_CMD_POLLING:
		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
		"rtl_hal_pwrseqcmdparsing(): PWR_CMD_POLLING\n");
		polling_bit = false;
		offset = GET_PWR_CFG_OFFSET(cfg_cmd);

		do {
		value = rtl_read_byte(rtlpriv, offset);

		value &= GET_PWR_CFG_MASK(cfg_cmd);
		if (value ==
		(GET_PWR_CFG_VALUE(cfg_cmd)
		& GET_PWR_CFG_MASK(cfg_cmd)))
		polling_bit = true;
		else
		udelay(10);

		if (polling_count++ > max_polling_cnt)
		return false;
		} while (!polling_bit);
		break;
		case PWR_CMD_DELAY:
		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
		"rtl_hal_pwrseqcmdparsing(): PWR_CMD_DELAY\n");
		if (GET_PWR_CFG_VALUE(cfg_cmd) ==
		PWRSEQ_DELAY_US)
		udelay(GET_PWR_CFG_OFFSET(cfg_cmd));
		else
		mdelay(GET_PWR_CFG_OFFSET(cfg_cmd));
		break;
		case PWR_CMD_END:
		RT_TRACE(rtlpriv, COMP_INIT, DBG_TRACE,
		"rtl_hal_pwrseqcmdparsing(): PWR_CMD_END\n");
		return true;
		default:
		RT_ASSERT(false,
		"rtl_hal_pwrseqcmdparsing(): Unknown CMD!!\n");
		break;
		}

		}
		ary_idx++;
		} while (1);

		return true;
		}
		EXPORT_SYMBOL(rtl_hal_pwrseqcmdparsing);

		bool rtl_ps_enable_nic(struct ieee80211_hw *hw)
		{
		struct rtl_priv *rtlpriv = rtl_priv(hw);

drivers/net/wireless/rtlwifi/ps.h

+60 −0

Original line number	Diff line number	Diff line
		@@ -32,6 +32,66 @@

		#define MAX_SW_LPS_SLEEP_INTV 5

		/*---------------------------------------------
		* 3 The value of cmd: 4 bits
		*---------------------------------------------
		*/
		#define PWR_CMD_READ 0x00
		#define PWR_CMD_WRITE 0x01
		#define PWR_CMD_POLLING 0x02
		#define PWR_CMD_DELAY 0x03
		#define PWR_CMD_END 0x04

		/* define the base address of each block */
		#define PWR_BASEADDR_MAC 0x00
		#define PWR_BASEADDR_USB 0x01
		#define PWR_BASEADDR_PCIE 0x02
		#define PWR_BASEADDR_SDIO 0x03

		#define PWR_FAB_ALL_MSK (BIT(0)\|BIT(1)\|BIT(2)\|BIT(3))
		#define PWR_CUT_TESTCHIP_MSK BIT(0)
		#define PWR_CUT_A_MSK BIT(1)
		#define PWR_CUT_B_MSK BIT(2)
		#define PWR_CUT_C_MSK BIT(3)
		#define PWR_CUT_D_MSK BIT(4)
		#define PWR_CUT_E_MSK BIT(5)
		#define PWR_CUT_F_MSK BIT(6)
		#define PWR_CUT_G_MSK BIT(7)
		#define PWR_CUT_ALL_MSK 0xFF
		#define PWR_INTF_SDIO_MSK BIT(0)
		#define PWR_INTF_USB_MSK BIT(1)
		#define PWR_INTF_PCI_MSK BIT(2)
		#define PWR_INTF_ALL_MSK (BIT(0)\|BIT(1)\|BIT(2)\|BIT(3))

		enum pwrseq_delay_unit {
		PWRSEQ_DELAY_US,
		PWRSEQ_DELAY_MS,
		};

		struct wlan_pwr_cfg {
		u16 offset;
		u8 cut_msk;
		u8 fab_msk:4;
		u8 interface_msk:4;
		u8 base:4;
		u8 cmd:4;
		u8 msk;
		u8 value;
		};

		#define GET_PWR_CFG_OFFSET(__PWR_CMD) (__PWR_CMD.offset)
		#define GET_PWR_CFG_CUT_MASK(__PWR_CMD) (__PWR_CMD.cut_msk)
		#define GET_PWR_CFG_FAB_MASK(__PWR_CMD) (__PWR_CMD.fab_msk)
		#define GET_PWR_CFG_INTF_MASK(__PWR_CMD) (__PWR_CMD.interface_msk)
		#define GET_PWR_CFG_BASE(__PWR_CMD) (__PWR_CMD.base)
		#define GET_PWR_CFG_CMD(__PWR_CMD) (__PWR_CMD.cmd)
		#define GET_PWR_CFG_MASK(__PWR_CMD) (__PWR_CMD.msk)
		#define GET_PWR_CFG_VALUE(__PWR_CMD) (__PWR_CMD.value)

		bool rtl_hal_pwrseqcmdparsing(struct rtl_priv *rtlpriv, u8 cut_version,
		u8 fab_version, u8 interface_type,
		struct wlan_pwr_cfg pwrcfgcmd[]);

		bool rtl_ps_set_rf_state(struct ieee80211_hw *hw,
		enum rf_pwrstate state_toset, u32 changesource);
		bool rtl_ps_enable_nic(struct ieee80211_hw *hw);