Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 24c16439 authored by Christian König's avatar Christian König Committed by Alex Deucher
Browse files

drm/radeon: drop CP page table updates & cleanup v2 



The DMA ring seems to be stable now.

v2: remove pt_ring_index as well

Signed-off-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 74d360f6

drivers/gpu/drm/radeon/cik.c

+0 −61
Original line number Diff line number Diff line
@@ -67,11 +67,6 @@ extern void si_init_uvd_internal_cg(struct radeon_device *rdev); 
extern int cik_sdma_resume(struct radeon_device *rdev);

extern void cik_sdma_enable(struct radeon_device *rdev, bool enable);

extern void cik_sdma_fini(struct radeon_device *rdev);

extern void cik_sdma_vm_set_page(struct radeon_device *rdev,

				 struct radeon_ib *ib,

				 uint64_t pe,

				 uint64_t addr, unsigned count,

				 uint32_t incr, uint32_t flags);

static void cik_rlc_stop(struct radeon_device *rdev);

static void cik_pcie_gen3_enable(struct radeon_device *rdev);

static void cik_program_aspm(struct radeon_device *rdev);
@@ -4903,62 +4898,6 @@ void cik_vm_flush(struct radeon_device *rdev, int ridx, struct radeon_vm *vm) 
	}

}



/**

 * cik_vm_set_page - update the page tables using sDMA

 *

 * @rdev: radeon_device pointer

 * @ib: indirect buffer to fill with commands

 * @pe: addr of the page entry

 * @addr: dst addr to write into pe

 * @count: number of page entries to update

 * @incr: increase next addr by incr bytes

 * @flags: access flags

 *

 * Update the page tables using CP or sDMA (CIK).

 */

void cik_vm_set_page(struct radeon_device *rdev,

		     struct radeon_ib *ib,

		     uint64_t pe,

		     uint64_t addr, unsigned count,

		     uint32_t incr, uint32_t flags)

{

	uint32_t r600_flags = cayman_vm_page_flags(rdev, flags);

	uint64_t value;

	unsigned ndw;



	if (rdev->asic->vm.pt_ring_index == RADEON_RING_TYPE_GFX_INDEX) {

		/* CP */

		while (count) {

			ndw = 2 + count * 2;

			if (ndw > 0x3FFE)

				ndw = 0x3FFE;



			ib->ptr[ib->length_dw++] = PACKET3(PACKET3_WRITE_DATA, ndw);

			ib->ptr[ib->length_dw++] = (WRITE_DATA_ENGINE_SEL(0) |

						    WRITE_DATA_DST_SEL(1));

			ib->ptr[ib->length_dw++] = pe;

			ib->ptr[ib->length_dw++] = upper_32_bits(pe);

			for (; ndw > 2; ndw -= 2, --count, pe += 8) {

				if (flags & RADEON_VM_PAGE_SYSTEM) {

					value = radeon_vm_map_gart(rdev, addr);

					value &= 0xFFFFFFFFFFFFF000ULL;

				} else if (flags & RADEON_VM_PAGE_VALID) {

					value = addr;

				} else {

					value = 0;

				}

				addr += incr;

				value |= r600_flags;

				ib->ptr[ib->length_dw++] = value;

				ib->ptr[ib->length_dw++] = upper_32_bits(value);

			}

		}

	} else {

		/* DMA */

		cik_sdma_vm_set_page(rdev, ib, pe, addr, count, incr, flags);

	}

}



/*

 * RLC

 * The RLC is a multi-purpose microengine that handles a

drivers/gpu/drm/radeon/cik_sdma.c

+7 −14
Original line number Diff line number Diff line
@@ -654,13 +654,12 @@ void cik_sdma_vm_set_page(struct radeon_device *rdev, 
			  uint64_t addr, unsigned count,

			  uint32_t incr, uint32_t flags)

{

	uint32_t r600_flags = cayman_vm_page_flags(rdev, flags);

	uint64_t value;

	unsigned ndw;



	trace_radeon_vm_set_page(pe, addr, count, incr, r600_flags);

	trace_radeon_vm_set_page(pe, addr, count, incr, flags);



	if (flags & RADEON_VM_PAGE_SYSTEM) {

	if (flags & R600_PTE_SYSTEM) {

		while (count) {

			ndw = count * 2;

			if (ndw > 0xFFFFE)
@@ -672,16 +671,10 @@ void cik_sdma_vm_set_page(struct radeon_device *rdev, 
			ib->ptr[ib->length_dw++] = upper_32_bits(pe);

			ib->ptr[ib->length_dw++] = ndw;

			for (; ndw > 0; ndw -= 2, --count, pe += 8) {

				if (flags & RADEON_VM_PAGE_SYSTEM) {

				value = radeon_vm_map_gart(rdev, addr);

				value &= 0xFFFFFFFFFFFFF000ULL;

				} else if (flags & RADEON_VM_PAGE_VALID) {

					value = addr;

				} else {

					value = 0;

				}

				addr += incr;

				value |= r600_flags;

				value |= flags;

				ib->ptr[ib->length_dw++] = value;

				ib->ptr[ib->length_dw++] = upper_32_bits(value);

			}
@@ -692,7 +685,7 @@ void cik_sdma_vm_set_page(struct radeon_device *rdev, 
			if (ndw > 0x7FFFF)

				ndw = 0x7FFFF;



			if (flags & RADEON_VM_PAGE_VALID)

			if (flags & R600_PTE_VALID)

				value = addr;

			else

				value = 0;
@@ -700,7 +693,7 @@ void cik_sdma_vm_set_page(struct radeon_device *rdev, 
			ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_GENERATE_PTE_PDE, 0, 0);

			ib->ptr[ib->length_dw++] = pe; /* dst addr */

			ib->ptr[ib->length_dw++] = upper_32_bits(pe);

			ib->ptr[ib->length_dw++] = r600_flags; /* mask */

			ib->ptr[ib->length_dw++] = flags; /* mask */

			ib->ptr[ib->length_dw++] = 0;

			ib->ptr[ib->length_dw++] = value; /* value */

			ib->ptr[ib->length_dw++] = upper_32_bits(value);

drivers/gpu/drm/radeon/ni.c

+0 −76
Original line number Diff line number Diff line
@@ -174,11 +174,6 @@ extern void evergreen_pcie_gen2_enable(struct radeon_device *rdev); 
extern void evergreen_program_aspm(struct radeon_device *rdev);

extern void sumo_rlc_fini(struct radeon_device *rdev);

extern int sumo_rlc_init(struct radeon_device *rdev);

extern void cayman_dma_vm_set_page(struct radeon_device *rdev,

				   struct radeon_ib *ib,

				   uint64_t pe,

				   uint64_t addr, unsigned count,

				   uint32_t incr, uint32_t flags);



/* Firmware Names */

MODULE_FIRMWARE("radeon/BARTS_pfp.bin");
@@ -2399,77 +2394,6 @@ void cayman_vm_decode_fault(struct radeon_device *rdev, 
	       block, mc_id);

}



#define R600_ENTRY_VALID   (1 << 0)

#define R600_PTE_SYSTEM    (1 << 1)

#define R600_PTE_SNOOPED   (1 << 2)

#define R600_PTE_READABLE  (1 << 5)

#define R600_PTE_WRITEABLE (1 << 6)



uint32_t cayman_vm_page_flags(struct radeon_device *rdev, uint32_t flags)

{

	uint32_t r600_flags = 0;

	r600_flags |= (flags & RADEON_VM_PAGE_VALID) ? R600_ENTRY_VALID : 0;

	r600_flags |= (flags & RADEON_VM_PAGE_READABLE) ? R600_PTE_READABLE : 0;

	r600_flags |= (flags & RADEON_VM_PAGE_WRITEABLE) ? R600_PTE_WRITEABLE : 0;

	if (flags & RADEON_VM_PAGE_SYSTEM) {

		r600_flags |= R600_PTE_SYSTEM;

		r600_flags |= (flags & RADEON_VM_PAGE_SNOOPED) ? R600_PTE_SNOOPED : 0;

	}

	return r600_flags;

}



/**

 * cayman_vm_set_page - update the page tables using the CP

 *

 * @rdev: radeon_device pointer

 * @ib: indirect buffer to fill with commands

 * @pe: addr of the page entry

 * @addr: dst addr to write into pe

 * @count: number of page entries to update

 * @incr: increase next addr by incr bytes

 * @flags: access flags

 *

 * Update the page tables using the CP (cayman/TN).

 */

void cayman_vm_set_page(struct radeon_device *rdev,

			struct radeon_ib *ib,

			uint64_t pe,

			uint64_t addr, unsigned count,

			uint32_t incr, uint32_t flags)

{

	uint32_t r600_flags = cayman_vm_page_flags(rdev, flags);

	uint64_t value;

	unsigned ndw;



	if (rdev->asic->vm.pt_ring_index == RADEON_RING_TYPE_GFX_INDEX) {

		while (count) {

			ndw = 1 + count * 2;

			if (ndw > 0x3FFF)

				ndw = 0x3FFF;



			ib->ptr[ib->length_dw++] = PACKET3(PACKET3_ME_WRITE, ndw);

			ib->ptr[ib->length_dw++] = pe;

			ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;

			for (; ndw > 1; ndw -= 2, --count, pe += 8) {

				if (flags & RADEON_VM_PAGE_SYSTEM) {

					value = radeon_vm_map_gart(rdev, addr);

					value &= 0xFFFFFFFFFFFFF000ULL;

				} else if (flags & RADEON_VM_PAGE_VALID) {

					value = addr;

				} else {

					value = 0;

				}

				addr += incr;

				value |= r600_flags;

				ib->ptr[ib->length_dw++] = value;

				ib->ptr[ib->length_dw++] = upper_32_bits(value);

			}

		}

	} else {

		cayman_dma_vm_set_page(rdev, ib, pe, addr, count, incr, flags);

	}

}



/**

 * cayman_vm_flush - vm flush using the CP

 *

drivers/gpu/drm/radeon/ni_dma.c

+8 −10
Original line number Diff line number Diff line
@@ -246,8 +246,7 @@ bool cayman_dma_is_lockup(struct radeon_device *rdev, struct radeon_ring *ring) 
 * @addr: dst addr to write into pe

 * @count: number of page entries to update

 * @incr: increase next addr by incr bytes

 * @flags: access flags

 * @r600_flags: hw access flags 

 * @flags: hw access flags 

 *

 * Update the page tables using the DMA (cayman/TN).

 */
@@ -257,13 +256,12 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, 
			    uint64_t addr, unsigned count,

			    uint32_t incr, uint32_t flags)

{

	uint32_t r600_flags = cayman_vm_page_flags(rdev, flags);

	uint64_t value;

	unsigned ndw;



	trace_radeon_vm_set_page(pe, addr, count, incr, r600_flags);

	trace_radeon_vm_set_page(pe, addr, count, incr, flags);



	if ((flags & RADEON_VM_PAGE_SYSTEM) || (count == 1)) {

	if ((flags & R600_PTE_SYSTEM) || (count == 1)) {

		while (count) {

			ndw = count * 2;

			if (ndw > 0xFFFFE)
@@ -274,16 +272,16 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, 
			ib->ptr[ib->length_dw++] = pe;

			ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;

			for (; ndw > 0; ndw -= 2, --count, pe += 8) {

				if (flags & RADEON_VM_PAGE_SYSTEM) {

				if (flags & R600_PTE_SYSTEM) {

					value = radeon_vm_map_gart(rdev, addr);

					value &= 0xFFFFFFFFFFFFF000ULL;

				} else if (flags & RADEON_VM_PAGE_VALID) {

				} else if (flags & R600_PTE_VALID) {

					value = addr;

				} else {

					value = 0;

				}

				addr += incr;

				value |= r600_flags;

				value |= flags;

				ib->ptr[ib->length_dw++] = value;

				ib->ptr[ib->length_dw++] = upper_32_bits(value);

			}
@@ -294,7 +292,7 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, 
			if (ndw > 0xFFFFE)

				ndw = 0xFFFFE;



			if (flags & RADEON_VM_PAGE_VALID)

			if (flags & R600_PTE_VALID)

				value = addr;

			else

				value = 0;
@@ -302,7 +300,7 @@ void cayman_dma_vm_set_page(struct radeon_device *rdev, 
			ib->ptr[ib->length_dw++] = DMA_PTE_PDE_PACKET(ndw);

			ib->ptr[ib->length_dw++] = pe; /* dst addr */

			ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff;

			ib->ptr[ib->length_dw++] = r600_flags; /* mask */

			ib->ptr[ib->length_dw++] = flags; /* mask */

			ib->ptr[ib->length_dw++] = 0;

			ib->ptr[ib->length_dw++] = value; /* value */

			ib->ptr[ib->length_dw++] = upper_32_bits(value);

drivers/gpu/drm/radeon/radeon.h

+6 −2
Original line number Diff line number Diff line
@@ -832,6 +832,12 @@ struct radeon_mec { 
#define RADEON_VM_PTB_ALIGN_MASK (RADEON_VM_PTB_ALIGN_SIZE - 1)

#define RADEON_VM_PTB_ALIGN(a) (((a) + RADEON_VM_PTB_ALIGN_MASK) & ~RADEON_VM_PTB_ALIGN_MASK)



#define R600_PTE_VALID		(1 << 0)

#define R600_PTE_SYSTEM		(1 << 1)

#define R600_PTE_SNOOPED	(1 << 2)

#define R600_PTE_READABLE	(1 << 5)

#define R600_PTE_WRITEABLE	(1 << 6)



struct radeon_vm {

	struct list_head		list;

	struct list_head		va;
@@ -1675,8 +1681,6 @@ struct radeon_asic { 
	struct {

		int (*init)(struct radeon_device *rdev);

		void (*fini)(struct radeon_device *rdev);



		u32 pt_ring_index;

		void (*set_page)(struct radeon_device *rdev,

				 struct radeon_ib *ib,

				 uint64_t pe,