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Commit 1f31c69d authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel into drm-next 

Daniel writes:

Bigger -fixes pile, mostly because I've included Ajax' DP dongle stuff,
as discussed on irc. Otherwise just small things:
- regression fix to finally make 6bpc auto-dither on dp work (Jani)
- reinstate an snb ctx w/a that accidentally got lost in a rework (Chris)
- fixup the DP train sequence, logic-goof-up uncovered by Coverty (Chris)
- fix set_caching locking (Ben)
- fix spurious segfault on con-current gtt mmap faulting (Dimitry and Mika)
- some pageflip correctness fixes (still hunting down some issues, but
  these are the worst offenders of confused code that we've tracked down
  thus far) from Chris and me
- fixup swizzling settings on vlv (Jesse)
- gt_mode w/a from Ben added, fixes snb gt1 rc6+hw ctx hangs.

* 'drm-intel-fixes' of git://people.freedesktop.org/~danvet/drm-intel:
  drm/i915: Fix GT_MODE default value
  drm/i915: don't frob the vblank ts in finish_page_flip
  drm/i915: call drm_handle_vblank before finish_page_flip
  drm/i915: print warning if vmi915_gem_fault error is not handled
  drm/i915: EBUSY status handling added to i915_gem_fault().
  drm/i915: Try harder to complete DP training pattern 1
  drm/i915: set swizzling to none on VLV
  drm/dp: Make sink count DP 1.2 aware
  drm/dp: Document DP spec versions for various DPCD registers
  drm/i915/dp: Be smarter about connection sense for branch devices
  drm/i915/dp: Fetch downstream port info if needed during DPCD fetch
  drm/dp: Update DPCD defines
  drm: Export drm_probe_ddc()
  drm/i915: Flush the pending flips on the CRTC before modification
  drm/i915: Actually invalidate the TLB for the SandyBridge HW contexts w/a
  drm/i915: Fix set_caching locking
  drm/i915: use adjusted_mode instead of mode for checking the 6bpc force flag
parents a5a0fc67 f8f2ac9a

drivers/gpu/drm/drm_edid.c

+2 −1
Original line number Original line Diff line number Diff line
@@ -395,13 +395,14 @@ out: 
 * \param adapter : i2c device adaptor

 * \param adapter : i2c device adaptor

 * \return 1 on success

 * \return 1 on success

 */

 */

static bool

bool

drm_probe_ddc(struct i2c_adapter *adapter)

drm_probe_ddc(struct i2c_adapter *adapter)

{

{

	unsigned char out;

	unsigned char out;





	return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);

	return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);

}

}

EXPORT_SYMBOL(drm_probe_ddc);





/**

/**

 * drm_get_edid - get EDID data, if available

 * drm_get_edid - get EDID data, if available

drivers/gpu/drm/i915/i915_gem.c

+10 −4
Original line number Original line Diff line number Diff line
@@ -1399,10 +1399,16 @@ out: 
	case 0:

	case 0:

	case -ERESTARTSYS:

	case -ERESTARTSYS:

	case -EINTR:

	case -EINTR:

	case -EBUSY:

		/*

		 * EBUSY is ok: this just means that another thread

		 * already did the job.

		 */

		return VM_FAULT_NOPAGE;

		return VM_FAULT_NOPAGE;

	case -ENOMEM:

	case -ENOMEM:

		return VM_FAULT_OOM;

		return VM_FAULT_OOM;

	default:

	default:

		WARN_ON_ONCE(ret);

		return VM_FAULT_SIGBUS;

		return VM_FAULT_SIGBUS;

	}

	}

}

}
@@ -3217,10 +3223,6 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data, 
	enum i915_cache_level level;

	enum i915_cache_level level;

	int ret;

	int ret;





	ret = i915_mutex_lock_interruptible(dev);

	if (ret)

		return ret;



	switch (args->caching) {

	switch (args->caching) {

	case I915_CACHING_NONE:

	case I915_CACHING_NONE:

		level = I915_CACHE_NONE;

		level = I915_CACHE_NONE;
@@ -3232,6 +3234,10 @@ int i915_gem_set_caching_ioctl(struct drm_device *dev, void *data, 
		return -EINVAL;

		return -EINVAL;

	}

	}





	ret = i915_mutex_lock_interruptible(dev);

	if (ret)

		return ret;



	obj = to_intel_bo(drm_gem_object_lookup(dev, file, args->handle));

	obj = to_intel_bo(drm_gem_object_lookup(dev, file, args->handle));

	if (&obj->base == NULL) {

	if (&obj->base == NULL) {

		ret = -ENOENT;

		ret = -ENOENT;

drivers/gpu/drm/i915/i915_gem_context.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -328,7 +328,7 @@ mi_set_context(struct intel_ring_buffer *ring, 
	 * itlb_before_ctx_switch.

	 * itlb_before_ctx_switch.

	 */

	 */

	if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {

	if (IS_GEN6(ring->dev) && ring->itlb_before_ctx_switch) {

		ret = ring->flush(ring, 0, 0);

		ret = ring->flush(ring, I915_GEM_GPU_DOMAINS, 0);

		if (ret)

		if (ret)

			return ret;

			return ret;

	}

	}

drivers/gpu/drm/i915/i915_gem_tiling.c

+4 −1
Original line number Original line Diff line number Diff line
@@ -91,7 +91,10 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) 
	uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;

	uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN;

	uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;

	uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN;





	if (INTEL_INFO(dev)->gen >= 6) {

	if (IS_VALLEYVIEW(dev)) {

		swizzle_x = I915_BIT_6_SWIZZLE_NONE;

		swizzle_y = I915_BIT_6_SWIZZLE_NONE;

	} else if (INTEL_INFO(dev)->gen >= 6) {

		uint32_t dimm_c0, dimm_c1;

		uint32_t dimm_c0, dimm_c1;

		dimm_c0 = I915_READ(MAD_DIMM_C0);

		dimm_c0 = I915_READ(MAD_DIMM_C0);

		dimm_c1 = I915_READ(MAD_DIMM_C1);

		dimm_c1 = I915_READ(MAD_DIMM_C1);

drivers/gpu/drm/i915/i915_irq.c

+8 −8
Original line number Original line Diff line number Diff line
@@ -697,12 +697,12 @@ static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS) 
			intel_opregion_gse_intr(dev);

			intel_opregion_gse_intr(dev);





		for (i = 0; i < 3; i++) {

		for (i = 0; i < 3; i++) {

			if (de_iir & (DE_PIPEA_VBLANK_IVB << (5 * i)))

				drm_handle_vblank(dev, i);

			if (de_iir & (DE_PLANEA_FLIP_DONE_IVB << (5 * i))) {

			if (de_iir & (DE_PLANEA_FLIP_DONE_IVB << (5 * i))) {

				intel_prepare_page_flip(dev, i);

				intel_prepare_page_flip(dev, i);

				intel_finish_page_flip_plane(dev, i);

				intel_finish_page_flip_plane(dev, i);

			}

			}

			if (de_iir & (DE_PIPEA_VBLANK_IVB << (5 * i)))

				drm_handle_vblank(dev, i);

		}

		}





		/* check event from PCH */

		/* check event from PCH */
@@ -784,6 +784,12 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS) 
	if (de_iir & DE_GSE)

	if (de_iir & DE_GSE)

		intel_opregion_gse_intr(dev);

		intel_opregion_gse_intr(dev);





	if (de_iir & DE_PIPEA_VBLANK)

		drm_handle_vblank(dev, 0);



	if (de_iir & DE_PIPEB_VBLANK)

		drm_handle_vblank(dev, 1);



	if (de_iir & DE_PLANEA_FLIP_DONE) {

	if (de_iir & DE_PLANEA_FLIP_DONE) {

		intel_prepare_page_flip(dev, 0);

		intel_prepare_page_flip(dev, 0);

		intel_finish_page_flip_plane(dev, 0);

		intel_finish_page_flip_plane(dev, 0);
@@ -794,12 +800,6 @@ static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS) 
		intel_finish_page_flip_plane(dev, 1);

		intel_finish_page_flip_plane(dev, 1);

	}

	}





	if (de_iir & DE_PIPEA_VBLANK)

		drm_handle_vblank(dev, 0);



	if (de_iir & DE_PIPEB_VBLANK)

		drm_handle_vblank(dev, 1);



	/* check event from PCH */

	/* check event from PCH */

	if (de_iir & DE_PCH_EVENT) {

	if (de_iir & DE_PCH_EVENT) {

		if (pch_iir & hotplug_mask)

		if (pch_iir & hotplug_mask)