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Commit 17f10fdc authored by Mika Kuoppala's avatar Mika Kuoppala Committed by Daniel Vetter
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drm/i915/ringbuffer: exclude last 2 cachelines on 845g on all callpaths 



Make intel_render_ring_init_dri and intel_init_ring_buffer symmetrical
with regards of workaround introduced by:

commit 27c1cbd0
Author: Chris Wilson <chris@chris-wilson.co.uk>
Date:   Mon Apr 9 13:59:46 2012 +0100

    drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g

Signed-off-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 00c09d70

drivers/gpu/drm/i915/intel_ringbuffer.c

+1 −1
Original line number Diff line number Diff line
@@ -1590,7 +1590,7 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size) 


	ring->size = size;

	ring->effective_size = ring->size;

	if (IS_I830(ring->dev))

	if (IS_I830(ring->dev) || IS_845G(ring->dev))

		ring->effective_size -= 128;



	ring->virtual_start = ioremap_wc(start, size);