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Commit 153f1d84 authored by Denis Carikli's avatar Denis Carikli Committed by Shawn Guo
Browse files

ARM: dts: Add support for the cpuimx35 board from Eukrea and its baseboard. 



The following devices/functionalities were added:
 * Main and secondary UARTs.
 * i2c and the pcf8563 device.
 * Ethernet.
 * NAND.
 * The BP1 button.
 * The LED.
 * Watchdog
 * SD.

Cc: Eric Bénard <eric@eukrea.com>
Cc: Grant Likely <grant.likely@linaro.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: default avatarDenis Carikli <denis@eukrea.com>
Acked-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 625df5bd

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -143,6 +143,7 @@ dtb-$(CONFIG_ARCH_MXC) += \ 
	imx27-phytec-phycard-s-som.dtb \

	imx27-phytec-phycard-s-rdk.dtb \

	imx31-bug.dtb \

	imx35-eukrea-mbimxsd35-baseboard.dtb \

	imx50-evk.dtb \

	imx51-apf51.dtb \

	imx51-apf51dev.dtb \

arch/arm/boot/dts/imx35-eukrea-cpuimx35.dtsi

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+81 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License

 * as published by the Free Software Foundation; either version 2

 * of the License, or (at your option) any later version.

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



#include "imx35.dtsi"



/ {

	model = "Eukrea CPUIMX35";

	compatible = "eukrea,cpuimx35", "fsl,imx35";



	memory {

		reg = <0x80000000 0x8000000>; /* 128M */

	};

};



&fec {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_fec>;

	status = "okay";

};



&i2c1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_i2c1>;

	status = "okay";



	pcf8563@51 {

		compatible = "nxp,pcf8563";

		reg = <0x51>;

	};

};



&iomuxc {

	imx35-eukrea {

		pinctrl_fec: fecgrp {

			fsl,pins = <

				MX35_PAD_FEC_TX_CLK__FEC_TX_CLK		0x80000000

				MX35_PAD_FEC_RX_CLK__FEC_RX_CLK		0x80000000

				MX35_PAD_FEC_RX_DV__FEC_RX_DV		0x80000000

				MX35_PAD_FEC_COL__FEC_COL		0x80000000

				MX35_PAD_FEC_RDATA0__FEC_RDATA_0	0x80000000

				MX35_PAD_FEC_TDATA0__FEC_TDATA_0	0x80000000

				MX35_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000

				MX35_PAD_FEC_MDC__FEC_MDC		0x80000000

				MX35_PAD_FEC_MDIO__FEC_MDIO		0x80000000

				MX35_PAD_FEC_TX_ERR__FEC_TX_ERR		0x80000000

				MX35_PAD_FEC_RX_ERR__FEC_RX_ERR		0x80000000

				MX35_PAD_FEC_CRS__FEC_CRS		0x80000000

				MX35_PAD_FEC_RDATA1__FEC_RDATA_1	0x80000000

				MX35_PAD_FEC_TDATA1__FEC_TDATA_1	0x80000000

				MX35_PAD_FEC_RDATA2__FEC_RDATA_2	0x80000000

				MX35_PAD_FEC_TDATA2__FEC_TDATA_2	0x80000000

				MX35_PAD_FEC_RDATA3__FEC_RDATA_3	0x80000000

				MX35_PAD_FEC_TDATA3__FEC_TDATA_3	0x80000000

			>;

		};



		pinctrl_i2c1: i2c1grp {

			fsl,pins = <

				MX35_PAD_I2C1_CLK__I2C1_SCL		0x80000000

				MX35_PAD_I2C1_DAT__I2C1_SDA		0x80000000

			>;

		};

	};

};



&nfc {

	nand-bus-width = <8>;

	nand-ecc-mode = "hw";

	nand-on-flash-bbt;

	status = "okay";

};

arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts

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+143 −0
Original line number Diff line number Diff line 
/*

 * Copyright 2013 Eukréa Electromatique <denis@eukrea.com>

 *

 * This program is free software; you can redistribute it and/or

 * modify it under the terms of the GNU General Public License

 * as published by the Free Software Foundation; either version 2

 * of the License, or (at your option) any later version.

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



/dts-v1/;



#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>

#include "imx35-eukrea-cpuimx35.dtsi"



/ {

	model = "Eukrea CPUIMX35";

	compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35";



	gpio_keys {

		compatible = "gpio-keys";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_bp1>;



		bp1 {

			label = "BP1";

			gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;

			linux,code = <BTN_MISC>;

			gpio-key,wakeup;

			linux,input-type = <1>;

		};

	};



	leds {

		compatible = "gpio-leds";

		pinctrl-names = "default";

		pinctrl-0 = <&pinctrl_led1>;



		led1 {

			label = "led1";

			gpios = <&gpio3 29 GPIO_ACTIVE_LOW>;

			linux,default-trigger = "heartbeat";

		};

	};

};



&audmux {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_audmux>;

	status = "okay";

};



&esdhc1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_esdhc1>;

	cd-gpios = <&gpio3 24>;

	status = "okay";

};



&i2c1 {

	tlv320aic23: codec@1a {

		compatible = "ti,tlv320aic23";

		reg = <0x1a>;

	};

};



&iomuxc {

	imx35-eukrea {

		pinctrl_audmux: audmuxgrp {

			fsl,pins = <

				MX35_PAD_STXFS4__AUDMUX_AUD4_TXFS	0x80000000

				MX35_PAD_STXD4__AUDMUX_AUD4_TXD		0x80000000

				MX35_PAD_SRXD4__AUDMUX_AUD4_RXD		0x80000000

				MX35_PAD_SCK4__AUDMUX_AUD4_TXC		0x80000000

			>;

		};



		pinctrl_bp1: bp1grp {

			fsl,pins = <MX35_PAD_LD19__GPIO3_25  0x80000000>;

		};



		pinctrl_esdhc1: esdhc1grp {

			fsl,pins = <

				MX35_PAD_SD1_CMD__ESDHC1_CMD		0x80000000

				MX35_PAD_SD1_CLK__ESDHC1_CLK		0x80000000

				MX35_PAD_SD1_DATA0__ESDHC1_DAT0		0x80000000

				MX35_PAD_SD1_DATA1__ESDHC1_DAT1		0x80000000

				MX35_PAD_SD1_DATA2__ESDHC1_DAT2		0x80000000

				MX35_PAD_SD1_DATA3__ESDHC1_DAT3		0x80000000

				MX35_PAD_LD18__GPIO3_24			0x80000000 /* CD */

			>;

		};



		pinctrl_led1: led1grp {

			fsl,pins = <MX35_PAD_LD23__GPIO3_29  0x80000000>;

		};



		pinctrl_reg_lcd_3v3: reg-lcd-3v3 {

			fsl,pins = <MX35_PAD_D3_CLS__GPIO1_4 0x80000000>;

		};



		pinctrl_uart1: uart1grp {

			fsl,pins = <

				MX35_PAD_TXD1__UART1_TXD_MUX		0x1c5

				MX35_PAD_RXD1__UART1_RXD_MUX		0x1c5

				MX35_PAD_CTS1__UART1_CTS		0x1c5

				MX35_PAD_RTS1__UART1_RTS		0x1c5

			>;

		};



		pinctrl_uart2: uart2grp {

			fsl,pins = <

				MX35_PAD_RXD2__UART2_RXD_MUX		0x1c5

				MX35_PAD_TXD2__UART2_TXD_MUX		0x1c5

				MX35_PAD_RTS2__UART2_RTS		0x1c5

				MX35_PAD_CTS2__UART2_CTS		0x1c5

			>;

		};

	};

};



&ssi1 {

	fsl,mode = "i2s-slave";

	status = "okay";

};



&uart1 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart1>;

	fsl,uart-has-rtscts;

	status = "okay";

};



&uart2 {

	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_uart2>;

	fsl,uart-has-rtscts;

	status = "okay";

};