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Commit 150966ad authored by Ariel Elior's avatar Ariel Elior Committed by David S. Miller
Browse files

bnx2x: Fix for a host coalescing bug which impared latency. 



Seperated Rx and Tx coalescing to different state machines.

Signed-off-by: default avatarAriel Elior <ariele@broadcom.com>
Signed-off-by: default avatarEilon Greenstein <eilong@broadcom.com>
Signed-off-by: default avatarDmitry Kravkov <dmitry@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent a5c53dbc

drivers/net/bnx2x/bnx2x.h

+9 −16
Original line number Diff line number Diff line
@@ -751,24 +751,17 @@ struct bnx2x_fastpath { 
#define FP_CSB_FUNC_OFF	\

			offsetof(struct cstorm_status_block_c, func)



#define HC_INDEX_TOE_RX_CQ_CONS		0 /* Formerly Ustorm TOE CQ index */

					  /* (HC_INDEX_U_TOE_RX_CQ_CONS)  */

#define HC_INDEX_ETH_RX_CQ_CONS		1 /* Formerly Ustorm ETH CQ index */

					  /* (HC_INDEX_U_ETH_RX_CQ_CONS)  */

#define HC_INDEX_ETH_RX_BD_CONS		2 /* Formerly Ustorm ETH BD index */

					  /* (HC_INDEX_U_ETH_RX_BD_CONS)  */



#define HC_INDEX_TOE_TX_CQ_CONS		4 /* Formerly Cstorm TOE CQ index   */

					  /* (HC_INDEX_C_TOE_TX_CQ_CONS)    */

#define HC_INDEX_ETH_TX_CQ_CONS_COS0	5 /* Formerly Cstorm ETH CQ index   */

					  /* (HC_INDEX_C_ETH_TX_CQ_CONS)    */

#define HC_INDEX_ETH_TX_CQ_CONS_COS1	6 /* Formerly Cstorm ETH CQ index   */

					  /* (HC_INDEX_C_ETH_TX_CQ_CONS)    */

#define HC_INDEX_ETH_TX_CQ_CONS_COS2	7 /* Formerly Cstorm ETH CQ index   */

					  /* (HC_INDEX_C_ETH_TX_CQ_CONS)    */

#define HC_INDEX_ETH_RX_CQ_CONS		1



#define HC_INDEX_ETH_FIRST_TX_CQ_CONS	HC_INDEX_ETH_TX_CQ_CONS_COS0

#define HC_INDEX_OOO_TX_CQ_CONS		4



#define HC_INDEX_ETH_TX_CQ_CONS_COS0	5



#define HC_INDEX_ETH_TX_CQ_CONS_COS1	6



#define HC_INDEX_ETH_TX_CQ_CONS_COS2	7



#define HC_INDEX_ETH_FIRST_TX_CQ_CONS	HC_INDEX_ETH_TX_CQ_CONS_COS0



#define BNX2X_RX_SB_INDEX \

	(&fp->sb_index_values[HC_INDEX_ETH_RX_CQ_CONS])

drivers/net/bnx2x/bnx2x_main.c

+33 −0
Original line number Diff line number Diff line
@@ -4828,6 +4828,37 @@ void bnx2x_setup_ndsb_state_machine(struct hc_status_block_sm *hc_sm, 
	hc_sm->time_to_expire = 0xFFFFFFFF;

}





/* allocates state machine ids. */

static inline

void bnx2x_map_sb_state_machines(struct hc_index_data *index_data)

{

	/* zero out state machine indices */

	/* rx indices */

	index_data[HC_INDEX_ETH_RX_CQ_CONS].flags &= ~HC_INDEX_DATA_SM_ID;



	/* tx indices */

	index_data[HC_INDEX_OOO_TX_CQ_CONS].flags &= ~HC_INDEX_DATA_SM_ID;

	index_data[HC_INDEX_ETH_TX_CQ_CONS_COS0].flags &= ~HC_INDEX_DATA_SM_ID;

	index_data[HC_INDEX_ETH_TX_CQ_CONS_COS1].flags &= ~HC_INDEX_DATA_SM_ID;

	index_data[HC_INDEX_ETH_TX_CQ_CONS_COS2].flags &= ~HC_INDEX_DATA_SM_ID;



	/* map indices */

	/* rx indices */

	index_data[HC_INDEX_ETH_RX_CQ_CONS].flags |=

		SM_RX_ID << HC_INDEX_DATA_SM_ID_SHIFT;



	/* tx indices */

	index_data[HC_INDEX_OOO_TX_CQ_CONS].flags |=

		SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT;

	index_data[HC_INDEX_ETH_TX_CQ_CONS_COS0].flags |=

		SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT;

	index_data[HC_INDEX_ETH_TX_CQ_CONS_COS1].flags |=

		SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT;

	index_data[HC_INDEX_ETH_TX_CQ_CONS_COS2].flags |=

		SM_TX_ID << HC_INDEX_DATA_SM_ID_SHIFT;

}



static void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid,

			  u8 vf_valid, int fw_sb_id, int igu_sb_id)

{
@@ -4859,6 +4890,7 @@ static void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, 
		hc_sm_p = sb_data_e2.common.state_machine;

		sb_data_p = (u32 *)&sb_data_e2;

		data_size = sizeof(struct hc_status_block_data_e2)/sizeof(u32);

		bnx2x_map_sb_state_machines(sb_data_e2.index_data);

	} else {

		memset(&sb_data_e1x, 0,

		       sizeof(struct hc_status_block_data_e1x));
@@ -4873,6 +4905,7 @@ static void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid, 
		hc_sm_p = sb_data_e1x.common.state_machine;

		sb_data_p = (u32 *)&sb_data_e1x;

		data_size = sizeof(struct hc_status_block_data_e1x)/sizeof(u32);

		bnx2x_map_sb_state_machines(sb_data_e1x.index_data);

	}



	bnx2x_setup_ndsb_state_machine(&hc_sm_p[SM_RX_ID],