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Commit 0c11f655 authored by Mark Brown's avatar Mark Brown
Browse files

ASoC: Fix FLL reference clock division setup in WM8993 



Signed-off-by: default avatarMark Brown <broonie@opensource.wolfsonmicro.com>
parent 8aa2df53

sound/soc/codecs/wm8993.c

+2 −0
Original line number Diff line number Diff line
@@ -345,8 +345,10 @@ static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, 


	/* Fref must be <=13.5MHz */

	div = 1;

	fll_div->fll_clk_ref_div = 0;

	while ((Fref / div) > 13500000) {

		div *= 2;

		fll_div->fll_clk_ref_div++;



		if (div > 8) {

			pr_err("Can't scale %dMHz input down to <=13.5MHz\n",