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Commit 08068cd5 authored by Ido Shamay's avatar Ido Shamay Committed by David S. Miller
Browse files

net/mlx4: Added qos_vport QP configuration in VST mode



Granular QoS per VF feature introduce a new QP field, qos_vport.

PF administrator can connect VF QPs to a certain QoS Vport, to
inherit its proporties. Connecting QPs to the default QoS Vport
(defined as 0) is always allowed, even when there are no allocated VPPs.
At this point, only the default vport is connected to QPs.

Signed-off-by: default avatarIdo Shamay <idos@mellanox.com>
Signed-off-by: default avatarOr Gerlitz <ogerlitz@mellanox.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 666672d4
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+8 −1
Original line number Original line Diff line number Diff line
@@ -48,6 +48,7 @@


#include "mlx4.h"
#include "mlx4.h"
#include "fw.h"
#include "fw.h"
#include "fw_qos.h"


#define CMD_POLL_TOKEN 0xffff
#define CMD_POLL_TOKEN 0xffff
#define INBOX_MASK	0xffffffffffffff00ULL
#define INBOX_MASK	0xffffffffffffff00ULL
@@ -1808,7 +1809,8 @@ static int mlx4_master_immediate_activate_vlan_qos(struct mlx4_priv *priv,


	if (vp_oper->state.default_vlan == vp_admin->default_vlan &&
	if (vp_oper->state.default_vlan == vp_admin->default_vlan &&
	    vp_oper->state.default_qos == vp_admin->default_qos &&
	    vp_oper->state.default_qos == vp_admin->default_qos &&
	    vp_oper->state.link_state == vp_admin->link_state)
	    vp_oper->state.link_state == vp_admin->link_state &&
	    vp_oper->state.qos_vport == vp_admin->qos_vport)
		return 0;
		return 0;


	if (!(priv->mfunc.master.slave_state[slave].active &&
	if (!(priv->mfunc.master.slave_state[slave].active &&
@@ -1866,6 +1868,7 @@ static int mlx4_master_immediate_activate_vlan_qos(struct mlx4_priv *priv,
	vp_oper->state.default_vlan = vp_admin->default_vlan;
	vp_oper->state.default_vlan = vp_admin->default_vlan;
	vp_oper->state.default_qos = vp_admin->default_qos;
	vp_oper->state.default_qos = vp_admin->default_qos;
	vp_oper->state.link_state = vp_admin->link_state;
	vp_oper->state.link_state = vp_admin->link_state;
	vp_oper->state.qos_vport = vp_admin->qos_vport;


	if (vp_admin->link_state == IFLA_VF_LINK_STATE_DISABLE)
	if (vp_admin->link_state == IFLA_VF_LINK_STATE_DISABLE)
		work->flags |= MLX4_VF_IMMED_VLAN_FLAG_LINK_DISABLE;
		work->flags |= MLX4_VF_IMMED_VLAN_FLAG_LINK_DISABLE;
@@ -1874,6 +1877,7 @@ static int mlx4_master_immediate_activate_vlan_qos(struct mlx4_priv *priv,
	work->port = port;
	work->port = port;
	work->slave = slave;
	work->slave = slave;
	work->qos = vp_oper->state.default_qos;
	work->qos = vp_oper->state.default_qos;
	work->qos_vport = vp_oper->state.qos_vport;
	work->vlan_id = vp_oper->state.default_vlan;
	work->vlan_id = vp_oper->state.default_vlan;
	work->vlan_ix = vp_oper->vlan_idx;
	work->vlan_ix = vp_oper->vlan_idx;
	work->priv = priv;
	work->priv = priv;
@@ -2339,6 +2343,9 @@ int mlx4_multi_func_init(struct mlx4_dev *dev)
				INIT_LIST_HEAD(&s_state->mcast_filters[port]);
				INIT_LIST_HEAD(&s_state->mcast_filters[port]);
				admin_vport->default_vlan = MLX4_VGT;
				admin_vport->default_vlan = MLX4_VGT;
				oper_vport->default_vlan = MLX4_VGT;
				oper_vport->default_vlan = MLX4_VGT;
				admin_vport->qos_vport =
						MLX4_VPP_DEFAULT_VPORT;
				oper_vport->qos_vport = MLX4_VPP_DEFAULT_VPORT;
				vf_oper->vport[port].vlan_idx = NO_INDX;
				vf_oper->vport[port].vlan_idx = NO_INDX;
				vf_oper->vport[port].mac_idx = NO_INDX;
				vf_oper->vport[port].mac_idx = NO_INDX;
			}
			}
+3 −0
Original line number Original line Diff line number Diff line
@@ -44,6 +44,9 @@
/* Default supported priorities for VPP allocation */
/* Default supported priorities for VPP allocation */
#define MLX4_DEFAULT_QOS_PRIO (0)
#define MLX4_DEFAULT_QOS_PRIO (0)


/* Derived from FW feature definition, 0 is the default vport fo all QPs */
#define MLX4_VPP_DEFAULT_VPORT (0)

struct mlx4_vport_qos_param {
struct mlx4_vport_qos_param {
	u32 bw_share;
	u32 bw_share;
	u32 max_avg_bw;
	u32 max_avg_bw;
+2 −0
Original line number Original line Diff line number Diff line
@@ -498,6 +498,7 @@ struct mlx4_vport_state {
	u32 tx_rate;
	u32 tx_rate;
	bool spoofchk;
	bool spoofchk;
	u32 link_state;
	u32 link_state;
	u8 qos_vport;
};
};


struct mlx4_vf_admin_state {
struct mlx4_vf_admin_state {
@@ -636,6 +637,7 @@ struct mlx4_vf_immed_vlan_work {
	int			orig_vlan_ix;
	int			orig_vlan_ix;
	u8			port;
	u8			port;
	u8			qos;
	u8			qos;
	u8                      qos_vport;
	u16			vlan_id;
	u16			vlan_id;
	u16			orig_vlan_id;
	u16			orig_vlan_id;
};
};
+5 −0
Original line number Original line Diff line number Diff line
@@ -447,6 +447,11 @@ int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn,
		cmd->qp_context.rate_limit_params = cpu_to_be16((params->rate_unit << 14) | params->rate_val);
		cmd->qp_context.rate_limit_params = cpu_to_be16((params->rate_unit << 14) | params->rate_val);
	}
	}


	if (attr & MLX4_UPDATE_QP_QOS_VPORT) {
		qp_mask |= 1ULL << MLX4_UPD_QP_MASK_QOS_VPP;
		cmd->qp_context.qos_vport = params->qos_vport;
	}

	cmd->primary_addr_path_mask = cpu_to_be64(pri_addr_path_mask);
	cmd->primary_addr_path_mask = cpu_to_be64(pri_addr_path_mask);
	cmd->qp_mask = cpu_to_be64(qp_mask);
	cmd->qp_mask = cpu_to_be64(qp_mask);


+6 −0
Original line number Original line Diff line number Diff line
@@ -765,6 +765,7 @@ static int update_vport_qp_param(struct mlx4_dev *dev,
		qpc->pri_path.feup |= MLX4_FEUP_FORCE_ETH_UP | MLX4_FVL_FORCE_ETH_VLAN;
		qpc->pri_path.feup |= MLX4_FEUP_FORCE_ETH_UP | MLX4_FVL_FORCE_ETH_VLAN;
		qpc->pri_path.sched_queue &= 0xC7;
		qpc->pri_path.sched_queue &= 0xC7;
		qpc->pri_path.sched_queue |= (vp_oper->state.default_qos) << 3;
		qpc->pri_path.sched_queue |= (vp_oper->state.default_qos) << 3;
		qpc->qos_vport = vp_oper->state.qos_vport;
	}
	}
	if (vp_oper->state.spoofchk) {
	if (vp_oper->state.spoofchk) {
		qpc->pri_path.feup |= MLX4_FSM_FORCE_ETH_SRC_MAC;
		qpc->pri_path.feup |= MLX4_FSM_FORCE_ETH_SRC_MAC;
@@ -4917,6 +4918,11 @@ void mlx4_vf_immed_vlan_work_handler(struct work_struct *_work)
					qp->sched_queue & 0xC7;
					qp->sched_queue & 0xC7;
				upd_context->qp_context.pri_path.sched_queue |=
				upd_context->qp_context.pri_path.sched_queue |=
					((work->qos & 0x7) << 3);
					((work->qos & 0x7) << 3);
				upd_context->qp_mask |=
					cpu_to_be64(1ULL <<
						    MLX4_UPD_QP_MASK_QOS_VPP);
				upd_context->qp_context.qos_vport =
					work->qos_vport;
			}
			}


			err = mlx4_cmd(dev, mailbox->dma,
			err = mlx4_cmd(dev, mailbox->dma,
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