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Commit 03054d51 authored by Anton Blanchard's avatar Anton Blanchard Committed by Paul Mackerras
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[PATCH] powerpc: Add cputable entry for POWER6 



Add a cputable entry for the POWER6 processor.

The SIHV and SIPR bits in the mmcra have moved in POWER6, so disable
support for that until oprofile is fixed.

Also tell firmware that we know about POWER6.

Signed-off-by: default avatarAnton Blanchard <anton@samba.org>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 09b03b6c

arch/powerpc/kernel/cputable.c

+16 −0
Original line number Diff line number Diff line
@@ -57,6 +57,8 @@ extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 
				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)

#define COMMON_USER_POWER5_PLUS	(COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\

				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)

#define COMMON_USER_POWER6	(COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\

				 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)

#define COMMON_USER_BOOKE	(PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \

				 PPC_FEATURE_BOOKE)
@@ -263,6 +265,20 @@ struct cpu_spec cpu_specs[] = { 
		.oprofile_type		= PPC_OPROFILE_POWER4,

		.platform		= "power5+",

	},

	{	/* Power6 */

		.pvr_mask		= 0xffff0000,

		.pvr_value		= 0x003e0000,

		.cpu_name		= "POWER6",

		.cpu_features		= CPU_FTRS_POWER6,

		.cpu_user_features	= COMMON_USER_POWER6,

		.icache_bsize		= 128,

		.dcache_bsize		= 128,

		.num_pmcs		= 6,

		.cpu_setup		= __setup_cpu_power4,

		.oprofile_cpu_type	= "ppc64/power6",

		.oprofile_type		= PPC_OPROFILE_POWER4,

		.platform		= "power6",

	},

	{	/* Cell Broadband Engine */

		.pvr_mask		= 0xffff0000,

		.pvr_value		= 0x00700000,

arch/powerpc/kernel/prom_init.c

+1 −0
Original line number Diff line number Diff line
@@ -686,6 +686,7 @@ static void __init early_cmdline_parse(void) 
 */

static unsigned char ibm_architecture_vec[] = {

	W(0xfffe0000), W(0x003a0000),	/* POWER5/POWER5+ */

	W(0xffff0000), W(0x003e0000),	/* POWER6 */

	W(0xfffffffe), W(0x0f000001),	/* all 2.04-compliant and earlier */

	5 - 1,				/* 5 option vectors */

include/asm-powerpc/cputable.h

+10 −4
Original line number Diff line number Diff line
@@ -22,6 +22,7 @@ 
#define PPC_FEATURE_BOOKE		0x00008000

#define PPC_FEATURE_SMT			0x00004000

#define PPC_FEATURE_ICACHE_SNOOP	0x00002000

#define PPC_FEATURE_ARCH_2_05		0x00001000



#ifdef __KERNEL__

#ifndef __ASSEMBLY__
@@ -320,6 +321,11 @@ extern void do_cpu_ftr_fixups(unsigned long offset); 
	    CPU_FTR_MMCRA | CPU_FTR_SMT | \

	    CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \

	    CPU_FTR_MMCRA_SIHV | CPU_FTR_PURR)

#define CPU_FTRS_POWER6 (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \

	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \

	    CPU_FTR_MMCRA | CPU_FTR_SMT | \

	    CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \

	    CPU_FTR_PURR | CPU_FTR_CI_LARGE_PAGE)

#define CPU_FTRS_CELL	(CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | \

	    CPU_FTR_HPTE_TABLE | CPU_FTR_PPCAS_ARCH_V2 | \

	    CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
@@ -331,8 +337,8 @@ extern void do_cpu_ftr_fixups(unsigned long offset); 
#ifdef __powerpc64__

#define CPU_FTRS_POSSIBLE	\

	    (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |	\

	    CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_CELL |	\

            CPU_FTR_CI_LARGE_PAGE)

	    CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 |	\

	    CPU_FTRS_CELL | CPU_FTR_CI_LARGE_PAGE)

#else

enum {

	CPU_FTRS_POSSIBLE =
@@ -376,8 +382,8 @@ enum { 
#ifdef __powerpc64__

#define CPU_FTRS_ALWAYS		\

	    (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 &	\

	    CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_CELL &	\

	    CPU_FTRS_POSSIBLE)

	    CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 &	\

	    CPU_FTRS_CELL & CPU_FTRS_POSSIBLE)

#else

enum {

	CPU_FTRS_ALWAYS =