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Commit 0055dc5b authored by Linus Torvalds's avatar Linus Torvalds
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Pull spi updates from Mark Brown:
 "Only one framework update this time around, a change from Lars-Peter
  to move full to pm_ops and remove the legacy bus PM ops.  Otherwise
  it's all driver updates:

   - make the spidev driver complain loudly if registered as spidev with
     DT rather than with a compatible string, hopefully helping people
     avoid making that mistake.

   - error handling and robustness fixes for the Designware and Intel
     MID drivers from Andy Shevchenko.

   - substantial performance improvements for the Raspberry Pi driver
     from Martin Sperl.

   - several new features for spidev_test from Adrian Remonda and Ian
     Abbott"

* tag 'spi-v4.1' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (75 commits)
  spi: bcm2835: enabling polling mode for transfers shorter than 30us
  spi: bcm2835: transform native-cs to gpio-cs on first spi_setup
  spi: img-spfi: Control CS lines with GPIO
  spi: img-spfi: Reset controller after each message
  spi: img-spfi: Implement a handle_err() callback
  spi: img-spfi: Setup TRANSACTION register before CONTROL register
  spi: Make master->handle_err() callback optional to avoid crashes
  spi: img-spfi: Limit bit clock to 1/4th of input clock
  spi: img-spfi: Implement a prepare_message() callback
  spi: fsl-dspi: Add ~50ns delay between cs and sck
  spi: fsl-dspi: Add cs-sck delays
  spi: fsl-dspi: Fix clock rate scale values
  spi: signedness bug in qspi_trigger_transfer_out_int()
  spi: imx: read back the RX/TX watermark levels earlier
  spi: spi-bfin5xx: Initialize cr_width in bfin_spi_pump_transfers()
  spi: bitbang: only toggle bitchanges
  spi: pxa2xx: missing break in pxa2xx_ssp_get_clk_div()
  spi: fsl-dspi: Fix clock rate scale values
  spi: Using Trigger number to transmit/receive data
  spi: bcm2835: fill FIFO before enabling interrupts to reduce interrupts/message
  ...
parents 1b57c7c2 56afdb70
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+11 −1
Original line number Original line Diff line number Diff line
@@ -2,11 +2,21 @@
  (CSPI/eCSPI) for i.MX
  (CSPI/eCSPI) for i.MX


Required properties:
Required properties:
- compatible : Should be "fsl,<soc>-cspi" or "fsl,<soc>-ecspi"
- compatible :
  - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1
  - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21
  - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27
  - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
  - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
  - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
- reg : Offset and length of the register set for the device
- reg : Offset and length of the register set for the device
- interrupts : Should contain CSPI/eCSPI interrupt
- interrupts : Should contain CSPI/eCSPI interrupt
- fsl,spi-num-chipselects : Contains the number of the chipselect
- fsl,spi-num-chipselects : Contains the number of the chipselect
- cs-gpios : Specifies the gpio pins to be used for chipselects.
- cs-gpios : Specifies the gpio pins to be used for chipselects.
- clocks : Clock specifiers for both ipg and per clocks.
- clock-names : Clock names should include both "ipg" and "per"
See the clock consumer binding,
	Documentation/devicetree/bindings/clock/clock-bindings.txt
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
		Documentation/devicetree/bindings/dma/dma.txt
		Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request names should include "tx" and "rx" if present.
- dma-names: DMA request names should include "tx" and "rx" if present.
+8 −0
Original line number Original line Diff line number Diff line
@@ -33,6 +33,11 @@ Optional properties:
		nodes.  If unspecified, a single SPI device without a chip
		nodes.  If unspecified, a single SPI device without a chip
		select can be used.
		select can be used.


- dmas:         Two DMA channel specifiers following the convention outlined
                in bindings/dma/dma.txt
- dma-names:    Names for the dma channels, if present. There must be at
                least one channel named "tx" for transmit and named "rx" for
                receive.


SPI slave nodes must be children of the SPI master node and can contain
SPI slave nodes must be children of the SPI master node and can contain
properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
properties described in Documentation/devicetree/bindings/spi/spi-bus.txt
@@ -51,6 +56,9 @@ Example:
		clocks = <&gcc GCC_BLSP2_QUP2_SPI_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
		clocks = <&gcc GCC_BLSP2_QUP2_SPI_APPS_CLK>, <&gcc GCC_BLSP2_AHB_CLK>;
		clock-names = "core", "iface";
		clock-names = "core", "iface";


		dmas = <&blsp1_bam 13>, <&blsp1_bam 12>;
		dma-names = "rx", "tx";

		pinctrl-names = "default";
		pinctrl-names = "default";
		pinctrl-0 = <&spi8_default>;
		pinctrl-0 = <&spi8_default>;


+8 −0
Original line number Original line Diff line number Diff line
@@ -16,6 +16,12 @@ Optional property:
  in big endian mode, otherwise in native mode(same with CPU), for more
  in big endian mode, otherwise in native mode(same with CPU), for more
  detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.
  detail please see: Documentation/devicetree/bindings/regmap/regmap.txt.


Optional SPI slave node properties:
- fsl,spi-cs-sck-delay: a delay in nanoseconds between activating chip
  select and the start of clock signal, at the start of a transfer.
- fsl,spi-sck-cs-delay: a delay in nanoseconds between stopping the clock
  signal and deactivating chip select, at the end of a transfer.

Example:
Example:


dspi0@4002c000 {
dspi0@4002c000 {
@@ -43,6 +49,8 @@ dspi0@4002c000 {
		reg = <0>;
		reg = <0>;
		linux,modalias = "m25p80";
		linux,modalias = "m25p80";
		modal = "at26df081a";
		modal = "at26df081a";
		fsl,spi-cs-sck-delay = <100>;
		fsl,spi-sck-cs-delay = <50>;
	};
	};
};
};


+1 −0
Original line number Original line Diff line number Diff line
@@ -14,6 +14,7 @@ Required properties:
- dma-names: Must include the following entries:
- dma-names: Must include the following entries:
  - rx
  - rx
  - tx
  - tx
- cs-gpios: Must specify the GPIOs used for chipselect lines.
- #address-cells: Must be 1.
- #address-cells: Must be 1.
- #size-cells: Must be 0.
- #size-cells: Must be 0.


+4 −0
Original line number Original line Diff line number Diff line
@@ -24,6 +24,9 @@ Optional Properties:
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
		Documentation/devicetree/bindings/dma/dma.txt
		Documentation/devicetree/bindings/dma/dma.txt
- dma-names: DMA request names should include "tx" and "rx" if present.
- dma-names: DMA request names should include "tx" and "rx" if present.
- rx-sample-delay-ns: nanoseconds to delay after the SCLK edge before sampling
		Rx data (may need to be fine tuned for high capacitance lines).
		No delay (0) by default.




Example:
Example:
@@ -33,6 +36,7 @@ Example:
		reg = <0xff110000 0x1000>;
		reg = <0xff110000 0x1000>;
		dmas = <&pdma1 11>, <&pdma1 12>;
		dmas = <&pdma1 11>, <&pdma1 12>;
		dma-names = "tx", "rx";
		dma-names = "tx", "rx";
		rx-sample-delay-ns = <10>;
		#address-cells = <1>;
		#address-cells = <1>;
		#size-cells = <0>;
		#size-cells = <0>;
		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
		interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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