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Commit e5eb925a authored by Ralf Baechle's avatar Ralf Baechle
Browse files

MIPS: Change type of asid_cache to unsigned long 



asid_cache must be unsigned long otherwise on 64 bit systems it will
become 0 if the value in get_new_mmu_context() reaches 0xffffffff and
in the end the assumption of ASID_FIRST_VERSION is not true anymore
thus leads to more dangerous things.

Initial patch by Yong Zhang <yong.zhang@windriver.com>

Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
Reported-by: default avatarlibin <huawei.libin@huawei.com>
parent 60b5f90d

arch/mips/include/asm/cpu-info.h

+2 −2
Original line number Diff line number Diff line
@@ -39,14 +39,14 @@ struct cache_desc { 
#define MIPS_CACHE_PINDEX	0x00000020	/* Physically indexed cache */



struct cpuinfo_mips {

	unsigned int		udelay_val;

	unsigned int		asid_cache;

	unsigned long		asid_cache;



	/*

	 * Capability and feature descriptor structure for MIPS CPU

	 */

	unsigned long		options;

	unsigned long		ases;

	unsigned int		udelay_val;

	unsigned int		processor_id;

	unsigned int		fpu_id;

	unsigned int		msa_id;