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Commit e542a226 authored by Hayes Wang's avatar Hayes Wang Committed by Francois Romieu
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r8169: adjust the RxConfig settings. 



Set the init value before reset in probe function. And then just
modify the relative bits and keep the init settings.

For 8110S, 8110SB, and 8110SC series, the initial value of RxConfig
needs to be set after the tx/rx is enabled.

Signed-off-by: default avatarHayes Wang <hayeswang@realtek.com>
Acked-by: default avatarFrancois Romieu <romieu@fr.zoreil.com>
parent aaa89c08

drivers/net/r8169.c

+44 −12
Original line number Original line Diff line number Diff line
@@ -286,7 +286,6 @@ enum rtl_registers { 
#define	RXCFG_DMA_SHIFT			8

#define	RXCFG_DMA_SHIFT			8

					/* Unlimited maximum PCI burst. */

					/* Unlimited maximum PCI burst. */

#define	RX_DMA_BURST			(7 << RXCFG_DMA_SHIFT)

#define	RX_DMA_BURST			(7 << RXCFG_DMA_SHIFT)

#define RTL_RX_CONFIG_MASK		0xff7e1880u





	RxMissed	= 0x4c,

	RxMissed	= 0x4c,

	Cfg9346		= 0x50,

	Cfg9346		= 0x50,
@@ -728,8 +727,6 @@ static void rtl8169_down(struct net_device *dev); 
static void rtl8169_rx_clear(struct rtl8169_private *tp);

static void rtl8169_rx_clear(struct rtl8169_private *tp);

static int rtl8169_poll(struct napi_struct *napi, int budget);

static int rtl8169_poll(struct napi_struct *napi, int budget);





static const unsigned int rtl8169_rx_config = RX_FIFO_THRESH | RX_DMA_BURST;



static u32 ocp_read(struct rtl8169_private *tp, u8 mask, u16 reg)

static u32 ocp_read(struct rtl8169_private *tp, u8 mask, u16 reg)

{

{

	void __iomem *ioaddr = tp->mmio_addr;

	void __iomem *ioaddr = tp->mmio_addr;
@@ -3503,6 +3500,42 @@ static void __devinit rtl_init_pll_power_ops(struct rtl8169_private *tp) 
	}

	}

}

}





static void rtl_init_rxcfg(struct rtl8169_private *tp)

{

	void __iomem *ioaddr = tp->mmio_addr;



	switch (tp->mac_version) {

	case RTL_GIGA_MAC_VER_01:

	case RTL_GIGA_MAC_VER_02:

	case RTL_GIGA_MAC_VER_03:

	case RTL_GIGA_MAC_VER_04:

	case RTL_GIGA_MAC_VER_05:

	case RTL_GIGA_MAC_VER_06:

	case RTL_GIGA_MAC_VER_10:

	case RTL_GIGA_MAC_VER_11:

	case RTL_GIGA_MAC_VER_12:

	case RTL_GIGA_MAC_VER_13:

	case RTL_GIGA_MAC_VER_14:

	case RTL_GIGA_MAC_VER_15:

	case RTL_GIGA_MAC_VER_16:

	case RTL_GIGA_MAC_VER_17:

		RTL_W32(RxConfig, RX_FIFO_THRESH | RX_DMA_BURST);

		break;

	case RTL_GIGA_MAC_VER_18:

	case RTL_GIGA_MAC_VER_19:

	case RTL_GIGA_MAC_VER_20:

	case RTL_GIGA_MAC_VER_21:

	case RTL_GIGA_MAC_VER_22:

	case RTL_GIGA_MAC_VER_23:

	case RTL_GIGA_MAC_VER_24:

		RTL_W32(RxConfig, RX128_INT_EN | RX_MULTI_EN | RX_DMA_BURST);

		break;

	default:

		RTL_W32(RxConfig, RX128_INT_EN | RX_DMA_BURST);

		break;

	}

}



static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)

static void rtl8169_init_ring_indexes(struct rtl8169_private *tp)

{

{

	tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;

	tp->dirty_tx = tp->dirty_rx = tp->cur_tx = tp->cur_rx = 0;
@@ -3630,6 +3663,11 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 
	if (!pci_is_pcie(pdev))

	if (!pci_is_pcie(pdev))

		netif_info(tp, probe, dev, "not PCI Express\n");

		netif_info(tp, probe, dev, "not PCI Express\n");





	/* Identify chip attached to board */

	rtl8169_get_mac_version(tp, dev, cfg->default_ver);



	rtl_init_rxcfg(tp);



	RTL_W16(IntrMask, 0x0000);

	RTL_W16(IntrMask, 0x0000);





	rtl_hw_reset(tp);

	rtl_hw_reset(tp);
@@ -3638,9 +3676,6 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 




	pci_set_master(pdev);

	pci_set_master(pdev);





	/* Identify chip attached to board */

	rtl8169_get_mac_version(tp, dev, cfg->default_ver);



	/*

	/*

	 * Pretend we are using VLANs; This bypasses a nasty bug where

	 * Pretend we are using VLANs; This bypasses a nasty bug where

	 * Interrupts stop flowing on high load on 8110SCd controllers.

	 * Interrupts stop flowing on high load on 8110SCd controllers.
@@ -3943,10 +3978,6 @@ static void rtl8169_hw_reset(struct rtl8169_private *tp) 
static void rtl_set_rx_tx_config_registers(struct rtl8169_private *tp)

static void rtl_set_rx_tx_config_registers(struct rtl8169_private *tp)

{

{

	void __iomem *ioaddr = tp->mmio_addr;

	void __iomem *ioaddr = tp->mmio_addr;

	u32 cfg = rtl8169_rx_config;



	cfg |= (RTL_R32(RxConfig) & RTL_RX_CONFIG_MASK);

	RTL_W32(RxConfig, cfg);





	/* Set DMA burst size and Interframe Gap Time */

	/* Set DMA burst size and Interframe Gap Time */

	RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |

	RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |
@@ -4034,6 +4065,8 @@ static void rtl_hw_start_8169(struct net_device *dev) 
	    tp->mac_version == RTL_GIGA_MAC_VER_04)

	    tp->mac_version == RTL_GIGA_MAC_VER_04)

		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);

		RTL_W8(ChipCmd, CmdTxEnb | CmdRxEnb);





	rtl_init_rxcfg(tp);



	RTL_W8(EarlyTxThres, NoEarlyTx);

	RTL_W8(EarlyTxThres, NoEarlyTx);





	rtl_set_rx_max_size(ioaddr, rx_buf_sz);

	rtl_set_rx_max_size(ioaddr, rx_buf_sz);
@@ -5553,8 +5586,7 @@ static void rtl_set_rx_mode(struct net_device *dev) 




	spin_lock_irqsave(&tp->lock, flags);

	spin_lock_irqsave(&tp->lock, flags);





	tmp = rtl8169_rx_config | rx_mode |

	tmp = RTL_R32(RxConfig) | rx_mode;

	      (RTL_R32(RxConfig) & RTL_RX_CONFIG_MASK);





	if (tp->mac_version > RTL_GIGA_MAC_VER_06) {

	if (tp->mac_version > RTL_GIGA_MAC_VER_06) {

		u32 data = mc_filter[0];

		u32 data = mc_filter[0];